MC68HC912DG128A MOTOROLA [Motorola, Inc], MC68HC912DG128A Datasheet - Page 150
MC68HC912DG128A
Manufacturer Part Number
MC68HC912DG128A
Description
microcontroller unit 16BIT DEVICE
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC912DG128A.pdf
(404 pages)
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Pseudo-STOP exit
in Limp Home
mode with Delay
Pseudo-STOP exit
in Limp Home
mode without
Delay (Fast Stop
Recovery)
Clock Functions
MC68HC912DT128A Rev 2.0
150
CAUTION:
(NOLHM=0, CME=X, DLY=1)
When coming out of Pseudo-STOP mode with the NOLHM bit cleared
and the DLY bit set, the MCU goes into limp-home mode (regardless of
the state of the CME or FCME bits).
The VCO supplies the limp-home clock frequency to the 13-stage
counter (XCLK). The BCSP output is forced high and MCS is forced low.
After the 13-stage counter reaches a count of 4096 XCLK cycles, a
check of the clock monitor is performed and as the crystal oscillator was
kept running due to the Pseudo-stop mode, the MCU exits STOP
normally, using the EXTALi clock. In the case where a crystal failure
occurred during pseudo-stop, then the MCU exits STOP using the limp
home clock (f
limp-home interrupt request set to indicate it is not operating at the
desired frequency. Each time the 13-stage counter reaches a count of
4096 XCLK cycles, a check of the clock monitor is performed. If the clock
monitor indicates the presence of an external clock, limp-home mode is
de-asserted, the LHOME flag is cleared and the LHIF limp-home
interrupt request is set to indicate a return to normal operation using
EXTALi clock.
(NOLHM=0, CME=X, DLY=0)
If Pseudo-STOP is exited with the NOLHM bit set to 0 and the DLY bit is
cleared then the exit from Pseudo-STOP is accomplished without delay
as in Fast STOP recovery.
Where Pseudo-STOP recovers using the Limp Home Clock the VCO -
which has been held in STOP - must be restarted in order to supply the
limp home frequency. This restart, which occurs at a high frequency and
ramps toward the limp home frequency, is almost immediately supplied
to the CPU before it may have reached the steady state frequency. It is
possible that the initial clock frequency may be high enough to cause the
CPU to function incorrectly with a resultant risk of code runaway.
VCOMIN
Clock Functions
) with both the LHOME flag set and the LHIF
MOTOROLA
16-clock
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