MC68HC912DG128A MOTOROLA [Motorola, Inc], MC68HC912DG128A Datasheet - Page 372

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MC68HC912DG128A

Manufacturer Part Number
MC68HC912DG128A
Description
microcontroller unit 16BIT DEVICE
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Electrical Characteristics
MC68HC912DT128A Rev 2.0
372
PLL reference frequency, crystal oscillator range
Bus frequency
VCO range
VCO Limp-Home frequency
Lock Detector transition from Acquisition to Tracking mode
Lock Detection
Un-Lock Detection
Lock Detector transition from Tracking to Acquisition mode
PLLON Stabilization delay
PLLON Total Stabilization delay
PLLON Acquisition mode stabilization delay
PLLON Tracking mode stabilization delay
1. VDDPLL at VDD level.
2. PLL stabilization delay is highly dependent on operational requirement and external component values (e.e. crystal, XFC
3. f
filter component values). Note
should be chosen based on operational requirement of system.
REF
= 4MHz, f
STOP Key Wake-Up Filter pulse interval
STOP Key Wake-Up Filter time
SYS
= 8MHz (REFDV = #$00, SYNR = #$01), XFC: Cs = 33nF, Cp - 3.3nF, Rs = 2.7K .
Characteristic
Characteristic
(2)
(3)
(3)
Table 81 STOP Key Wake-up Filter
shows typical delay values for a typical configuration. Appropriate XFC filter values
Table 80 CGM Characteristics
(3)
(3)
Electrical Characteristics
5.0 Volts +/- 10%
(1)
Symbol
t
KWSTP
t
KWSP
Symbol
f
VCOMIN
f
f
f
t
t
VCO
REF
BUS
stab
Lock
acq
t
unt
unl
trk
al
Min.
20
2
0.004
0.5%
Min.
3%
0%
6%
0.5
2.5
0.5
Max.
10
Max.
1.5%
2.5%
-
2.5
4%
8%
8
8
8
3
1
2
MOTOROLA
Unit
MHz
MHz
MHz
MHz
Unit
ms
ms
ms
s
s

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