MC68HC912DG128A MOTOROLA [Motorola, Inc], MC68HC912DG128A Datasheet - Page 308

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MC68HC912DG128A

Manufacturer Part Number
MC68HC912DG128A
Description
microcontroller unit 16BIT DEVICE
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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msCAN12
Identifier Mask
Registers
(CIDMR0–7)
MSCAN Controller
MC68HC912DT128A Rev 2.0
308
CIDMR0
CIDMR1
CIDMR2
CIDMR3
CIDMR4
CIDMR5
CIDMR6
CIDMR7
$0114
$0115
$0116
$0117
$011C
$011D
$011E
$011F
RESET
RESET
W
W
W
W
R
R
R
R
W
W
W
W
R
R
R
R
NOTE:
Bit 7
AM7
AM7
AM7
AM7
Bit 7
AM7
AM7
AM7
AM7
-
-
Figure 57 Identifier Mask Registers (2nd bank)
Figure 56 Identifier Mask Registers (1st bank)
AC7 – AC0 — Acceptance Code Bits
The CIDAR0–7 registers can only be written if the SFTRES bit in
CMCR0 is set.
The identifier mask register specifies which of the corresponding bits in
the identifier acceptance register are relevant for acceptance filtering.
AM6
AM6
AM6
AM6
AM6
AM6
AM6
AM6
AC7 – AC0 comprise a user defined sequence of bits with which the
corresponding bits of the related identifier register (IDRn) of the
receive message buffer are compared. The result of this comparison
is then masked with the corresponding identifier mask register.
6
6
-
-
AM5
AM5
AM5
AM5
AM5
AM5
AM5
AM5
5
5
-
-
MSCAN Controller
AM4
AM4
AM4
AM4
AM4
AM4
AM4
AM4
4
4
-
-
AM3
AM3
AM3
AM3
AM3
AM3
AM3
AM3
3
3
-
-
AM2
AM2
AM2
AM2
AM2
AM2
AM2
AM2
2
2
-
-
AM1
AM1
AM1
AM1
AM1
AM1
AM1
AM1
1
1
-
-
MOTOROLA
40-mscan12
Bit 0
AM0
AM0
AM0
AM0
AM0
AM0
AM0
AM0
Bit 0
-
-

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