P82B96T PHILIPS [NXP Semiconductors], P82B96T Datasheet
P82B96T
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P82B96T Summary of contents
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P82B96 Dual bidirectional bus buffer Rev. 06 — 31 January 2008 1. General description The P82B96 is a bipolar IC that creates a non-latching, bidirectional, logic interface between the normal C-bus logic signals to similar buses having ...
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... SO8 plastic small outline package; 8 leads; body width 3.9 mm Ordering options Topside mark Temperature range 82B96 +85 C P82B96PN +85 C P82B96T +85 C P82B96T +125 C Rev. 06 — 31 January 2008 P82B96 Dual bidirectional bus buffer 2 C-bus nodes up to Version SOT505-1 ...
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... Table 3. Symbol GND P82B96_6 Product data sheet P82B96 1 Sx (SDA (SCL) Block diagram of P82B96 P82B96TD P82B96TD/S410 GND 4 002aab978 Fig 3. Pin configuration for SO8 Pin description Pin Description C-bus (SDA or SCL) 2 receive signal ...
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NXP Semiconductors 7. Functional description Refer to The P82B96 has two identical buffers allowing buffering of both of the I SCL) signals. Each buffer is made up of two logic signal paths, a forward path from the 2 I C-bus ...
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... Sx I voltage on pin Tx buffered output voltage on pin Rx receive input current on any pin total power dissipation junction temperature operating range P82B96TD/S410 storage temperature ambient temperature operating Rev. 06 — 31 January 2008 Dual bidirectional bus buffer 2 C-bus logic voltage 2 C-bus logic voltage levels of all ...
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NXP Semiconductors 9. Characteristics Table 5. Characteristics T = +25 C; voltages are specified with respect to GND with V amb Symbol Parameter Power supply V supply voltage CC I supply current CC I additional quiescent CC supply current Bus ...
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NXP Semiconductors Table 5. Characteristics …continued T = +25 C; voltages are specified with respect to GND with V amb Symbol Parameter Input logic switching threshold voltages input logic voltage LOW on normal ...
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... C input capacitance i [1] Limit data for +125 C applies to P82B96TD/S410 version guaranteed by design/characterization, but not by 100 % test. [2] The minimum value requirement for pull-up current, 200 A, guarantees that the minimum value for V the minimum V input HIGH level to eliminate any possibility of latching. The specified difference is guaranteed by design within any IC. ...
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NXP Semiconductors 1000 V OL (mV) 800 600 400 typical and limits over temperature OL (1) Maximum (2) Typical (3) Minimum Fig function of junction temperature OL (I ...
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NXP Semiconductors 10. Application information Refer to AN460 and AN255 for more application detail. Fig 10. Interfacing an ‘I Fig 11. Galvanic isolation of I SDA SCL Fig 12. Long distance I P82B96_6 Product data sheet + ...
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NXP Semiconductors Figure 13 in applications that involve plug and socket connections and long cables that may become damaged. A simple circuit is added to monitor the SDA bus, and if its LOW time exceeds the design value, then the ...
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NXP Semiconductors Figure 14 calculating with lumped wiring capacitance yields reasonable approximations to actual timing, even 25 meters of cable is better treated using transmission line theory. Flat ribbon cables connected as shown, with the bus signals on the outer ...
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NXP Semiconductors V CC1 R2 R2 SCL C-BUS MASTER SDA Sy P82B96 C2 C2 GND Fig 14. Driving ribbon or flat telephone cables P82B96_6 Product data sheet +V cable drive ...
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Table 6. Examples of bus capability Refer to Figure 14 CC1 CC2 cable ( ) ( ) (pF 750 2.2 k 400 ...
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NXP Semiconductors 10.1 Calculating system delays and bus clock frequency for a Fast mode system local master bus V CCM SCL MASTER 2 I C-BUS GND (0 V) Effective delay of SCL at slave: 255 + 17V ...
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NXP Semiconductors local master bus V CCM SDA MASTER 2 I C-BUS GND (0 V) Effective delay of SDA at master = 270 + 0.2RsCs + 0.7 (RbCb + RmCm) ns Fig 17. Rising ...
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NXP Semiconductors edge from the master reaching the slave the SCL rising edge SDA, reaching the master The master microcontroller should be programmed to produce a nominal SCL LOW period = (1300 + A minimum SCL HIGH period of 600 ...
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NXP Semiconductors 400 800 1200 frequency = 624 kHz Fig 19. Propagation (Sx pull- pull- P82B96_6 Product data ...
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NXP Semiconductors 11. Package outline DIP8: plastic dual in-line package; 8 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. ...
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NXP Semiconductors SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 ...
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NXP Semiconductors TSSOP8: plastic thin shrink small outline package; 8 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 ...
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NXP Semiconductors 12. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 12.1 Introduction ...
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NXP Semiconductors 12.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including ...
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NXP Semiconductors Fig 24. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 13. Soldering of through-hole mount packages 13.1 Introduction to soldering through-hole mount ...
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NXP Semiconductors 13.4 Package related soldering information Table 9. Package CPGA, HCPGA DBS, DIP, HDIP, RDBS, SDIP, SIL [2] PMFP [1] For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. [2] For ...
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NXP Semiconductors 15. Revision history Table 11. Revision history Document ID Release date P82B96_6 20080131 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have ...
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NXP Semiconductors 16. Legal information 16.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
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NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...