SSTUB32866EC/S NXP [NXP Semiconductors], SSTUB32866EC/S Datasheet - Page 14
SSTUB32866EC/S
Manufacturer Part Number
SSTUB32866EC/S
Description
1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.SSTUB32866ECS.pdf
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NXP Semiconductors
SSTUB32866_4
Product data sheet
Fig 7.
PAR_IN
RESET
QERR
DCS
CSR
PPO
Q25
D25
CK
CK
Q1
D1
to
to
Timing diagram for SSTUB32866 used as a single device; C0 = 0, C1 = 0
10.1 Timing diagrams
CK to Q
t
PD
t
su
m
All information provided in this document is subject to legal disclaimers.
t
h
Rev. 04 — 15 April 2010
t
su
1.8 V DDR2-800 configurable registered buffer with parity
m + 1
t
h
CK to QERR
CK to PPO
t
t
PD
PD
m + 2
m + 3
SSTUB32866
CK to QERR
t
PD
© NXP B.V. 2010. All rights reserved.
m + 4
002aaa655
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