SSTUB32866EC/S NXP [NXP Semiconductors], SSTUB32866EC/S Datasheet - Page 15
![no-image](/images/no-image-200.jpg)
SSTUB32866EC/S
Manufacturer Part Number
SSTUB32866EC/S
Description
1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.SSTUB32866ECS.pdf
(30 pages)
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NXP Semiconductors
SSTUB32866_4
Product data sheet
Fig 8.
(not used)
PAR_IN
RESET
QERR
DCS
CSR
PPO
D14
Q14
CK
CK
Q1
D1
to
to
C1 = 1
Timing diagram for the first SSTUB32866 (1 : 2 Register A configuration) device used in pair; C0 = 0,
CK to Q
t
PD
t
su
m
All information provided in this document is subject to legal disclaimers.
t
h
CK to QERR
CK to PPO
Rev. 04 — 15 April 2010
t
t
t
su
PD
PD
1.8 V DDR2-800 configurable registered buffer with parity
m + 1
t
h
m + 2
CK to QERR
t
PD
m + 3
SSTUB32866
© NXP B.V. 2010. All rights reserved.
m + 4
002aaa656
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