ISD5116 WINBOND [Winbond], ISD5116 Datasheet - Page 9

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ISD5116

Manufacturer Part Number
ISD5116
Description
Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability
Manufacturer
WINBOND [Winbond]
Datasheet

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2.3 PINOUT TABLE
1
October 2000
ANA OUT+
ANA OUT-
Pin Name
AUX OUT
See the
ANA IN
AUX IN
VCCD
VCCA
ACAP
VSSD
VSSA
XCLK
MIC+
MIC-
RAC
SDA
SCL
SP+
SP-
INT
NC
A0
A1
Parameters section
Pin No.
2,15,22
1,14,28
28-pin
TSOP
12,13
6,7
10
11
16
17
18
19
20
23
21
25
26
27
24
3
4
5
8
9
Pin No.
9,15,23
7,21,22
28-pin
27,28
SOIC
5,6
24
25
26
10
11
12
13
16
14
18
19
20
17
1
3
4
2
8
of on page 38.
Functionality
Row Address Clock; an open drain output. The RAC pin goes LOW
T
exactly the end of each row of memory.
Interrupt Output; an open drain output that indicates that a set EOM bit
has been found during Playback or that the chip is in an Overflow (OVF)
condition. This pin remains LOW until a Read Status command is
executed.
This pin allows the internal clock of the device to be driven externally for
enhanced timing precision. This pin is grounded for most applications.
Serial Clock Line is part of the I
into and out of the I
Serial Data Line is part of the I
devices on the bus over this line.
Input pin that supplies the LSB for the I
Input pin that supplies the LSB +1 bit for the I
Differential Positive Input to the microphone amplifier.
Differential Negative Input to the microphone amplifier.
Differential Positive Analog Output for ANA OUT of the device.
Differential Negative Analog Output for ANA OUT of the device.
AGC Capacitor connection. Required for the on-chip AGC amplifier.
Differential Positive Speaker Driver Output.
Differential Negative Speaker Driver Output. When the speaker outputs
are in use, the AUX OUT output is disabled.
Analog Input. This is one of the gain adjustable analog inputs of the
device.
Auxiliary Input. This is one of the gain adjustable analog inputs of the
device.
Auxiliary Output. This is one the analog outputs of the device. When this
output is in use, the SP+ and SP- outputs are disabled.
Positive Digital Supply pins. These pins carry noise generated by
internal clocks in the chip. They must be carefully bypassed to Digital
Ground to insure correct device operation.
Digital Ground pins.
Analog Ground pins.
Positive Analog Supply pin. This pin supplies the low level audio
sections of the device. It should be carefully bypassed to Analog Ground
to insure correct device operation.
No Connect.
RACLO
1
before the end of each row of memory and returns HIGH at
2
C interface.
2
2
C interface. Data is passed between
C interface. It is used to clock the data
2
C Slave Address.
2
C Slave Address.
Page 8

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