NAND04G-B2D NUMONYX [Numonyx B.V], NAND04G-B2D Datasheet - Page 21

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NAND04G-B2D

Manufacturer Part Number
NAND04G-B2D
Description
4 Gbit, 8 Gbit, 2112 byte/1056 word page multiplane architecture, 1.8 V or 3 V, NAND Flash memories
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
NAND04G-B2D, NAND08G-BxC
5
Command set
All bus write operations to the device are interpreted by the command interface. The
commands are input on I/O0-I/O7 and are latched on the rising edge of Write Enable when
the command Latch Enable signal is high. Device operations are selected by writing specific
commands to the Command Register. The two-step command sequences for program and
erase operations are imposed to maximize data security.
Table 10
Table 10.
1. Commands in bold are referring to ONFI 1.0 specifications.
2. Only during cache read busy.
3. Command maintained for backward compatibility.
Read
Random Data Output
Cache Read (sequential)
Enhanced Cache Read (random)
Exit Cache Read
Page Program
(sequential input default)
Random Data Input
Multiplane Page Program
Multiplane Page Program
Copy Back Read
Copy Back Program
Multiplane Copy Back Program
Multiplane Copy Back Program
Block Erase
Multiplane Block Erase
Multiplane Block Erase
Reset
Read Electronic Signature
Read Status Register
Read Status Enhanced
Read Parameter Page
Read EDC Status Register
summarizes the commands.
Command
Commands
(1)
(3)
(3)
(3)
1
st
ECh
31h
00h
3Fh
80h
85h
60h
FFh
78h
7Bh
00h
05h
80h
85h
80h
00h
85h
85h
60h
60h
90h
70h
cycle
2
Bus write operations
nd
D1h
E0h
D0h
30h
31h
10h
11h
11h
35h
10h
11h
11h
60h
cycle
3
rd
D0h
81h
80h
81h
85h
60h
cycle
4
th
D0h
10h
10h
10h
10h
cycle
Command set
during busy
Commands
accepted
Yes
Yes
Yes
Yes
(2)
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