PSD813F1A-12J STMICROELECTRONICS [STMicroelectronics], PSD813F1A-12J Datasheet - Page 32

• Manufacturer Part Number: PSD813F1A-12J
• Description: Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

PSD813F1
Separate Space Modes
Code memory space is separated from data mem-
ory space. For example, the PSEN signal is used
to access the program code from the Flash Mem-
ory, while the RD signal is used to access data
from the EEPROM, SRAM and I/O Ports. This
configuration requires the VM register to be set to
0Ch. See
Figure 12. 80C31 Memory Modes - Separate Space
Figure 13. 80C31 Memory Mode - Combined Space
32/110
RD
PSEN
VM REG BIT 3
VM REG BIT 4
VM REG BIT 1
VM REG BIT 2
VM REG BIT 0
Figure 12.
DPLD
RD
RS0
EES0-EES3
FS0-FS7
PSEN
DPLD
RS0
EES0-EES3
FS0-FS7
CS
Memory
Flash
OE
Combined Space Modes
The program and data memory spaces are com-
bined into one space that allows the main Flash
Memory, EEPROM, and SRAM to be accessed by
either PSEN or RD. For example, to configure the
main Flash memory in combined space mode, bits
2 and 4 of the VM register are set to “1” (see Figure
13).
CS
Memory
Flash
OE
CS
EEPROM
Memory
OE
RD
CS
EEPROM
Memory
OE
CS
SRAM
OE
CS
SRAM
OE
AI09222
AI09223