PSD813F1A-12J STMICROELECTRONICS [STMicroelectronics], PSD813F1A-12J Datasheet - Page 96
![no-image](/images/no-image-200.jpg)
PSD813F1A-12J
Manufacturer Part Number
PSD813F1A-12J
Description
Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.PSD813F1A-12J.pdf
(110 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PSD813F1A-12JI
Manufacturer:
STMicroelectronics
Quantity:
10 000
PSD813F1
Figure 50. Peripheral I/O WRITE Timing
Table 65. Port A Peripheral Data Mode WRITE Timing (5V devices)
Note: 1. RD has the same timing as DS, LDS, UDS, and PSEN (in 8031 combined mode).
Table 66. Port A Peripheral Data Mode WRITE Timing (3V devices)
Note: 1. RD has the same timing as DS, LDS, UDS, and PSEN (in 8031 combined mode) signals.
96/110
t
t
t
t
t
t
WLQV–PA
DVQV–PA
WHQZ–PA
WLQV–PA
DVQV–PA
WHQZ–PA
Symbol
Symbol
2. WR has the same timing as the E, LDS, UDS, WRL, and WRH signals.
3. Any input used to select Port A Data Peripheral mode.
4. Data is already stable on Port A.
5. Data stable on ADIO pins to data on Port A.
2. WR has the same timing as the E, LDS, UDS, WRL, and WRH signals.
3. Any input used to select Port A Data Peripheral mode.
4. Data is already stable on Port A.
5. Data stable on ADIO pins to data on Port A.
WR to Data Propagation Delay
Data to Port A Data Propagation Delay
WR Invalid to Port A Tri-state
WR to Data Propagation Delay
Data to Port A Data Propagation Delay
WR Invalid to Port A Tri-state
A / D BUS
ALE/AS
WR
Parameter
Parameter
ADDRESS
Conditions
tWLQV
(Note
(Note
(Note
Conditions
(Note
(Note
(Note
2
5
2
(PA)
)
)
)
2
5
2
)
)
)
tDVQV (PA)
DATA OUT
Min Max Min Max Min Max
DATA OUT
PORT A
-90
Min
35
30
25
-15
Max
tWHQZ (PA)
45
40
33
-12
38
35
30
Min
AI02898
-20
-15
Max
55
45
35
40
38
33
Unit
Unit
ns
ns
ns
ns
ns
ns