NAND08GAH0A NUMONYX [Numonyx B.V], NAND08GAH0A Datasheet - Page 104

• Manufacturer Part Number: NAND08GAH0A
• Manufacturer: NUMONYX [Numonyx B.V]

Serial peripheral interface (SPI) mode
Table 68.
1. ‘R’ or ‘X’ mean the Error/Status bit may be affected by the respective command (using R or X detection mechanism
104/116
respectively). ‘S’ indicates Status bits.
CSD overwrite
Card locked
Erase reset
In idle state
Identifier
Status bits definition in SPI mode
Response Type
R1 R2
R1 R2
R2
R2
S
E
S
E
Detection
mode
R
X
-
-
(1)
‘0’= no error
‘0’= cleared
‘1’ = locked
‘0’= Ready
(continued)
unlocked
‘1’= error
‘1’= Idle
‘1’= set
Value
‘0’ =
This bit is set when the device is locked by
the host
Erase sequence cleared before executing
because an out of erase sequence command
was received
The device enters idle state after power-up or
reset command. It exits this state and
become ready upon completion of the
initialization sequence
Can be one of the following errors:
- The CID register has been already written
and cannot be overwritten
- The read only section of the CSD does
not match the device content.
- An attempt to reverse the copy (set as
original) or permanent WP (unprotected)
bits was made.
NAND08GAH0A, NAND16GAH0D
Description