NAND08GAH0A NUMONYX [Numonyx B.V], NAND08GAH0A Datasheet - Page 67
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NAND08GAH0A
Manufacturer Part Number
NAND08GAH0A
Description
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.NAND08GAH0A.pdf
(116 pages)
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NAND08GAH0AZA5E
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NAND08GAH0A, NAND16GAH0D
8.4.1
Table 49.
1. TBD stands for ‘to be defined’.
2. Reserved bits should read as ‘0’.
S_CMD_SET
This field defines which command sets are supported by the device.
Table 50.
Power class for
52 MHz at 1.95 V
Reserved
Card type
Reserved
CSD structure version
Reserved
Extended CSD revision EXT_CSD_REV
Modes segment
Command Set
Reserved
Command set revision
Reserved
Power class
Reserved
High speed interface
timing
Reserved
Bus Width mode
Reserved
Reserved
Name
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
Extended CSD
Supported command sets
7-5
Bit
4
3
2
1
0
PWR_CL_52_195
CARD_TYPE
CSD_STRUCTURE
CMD_SET
CMD_SET_REV
POWER_CLASS
HS_TIMING
BUS_WIDTH
(1)
Field
(continued)
Reserved
Allocated by MMCA
Allocated by MMCA
Allocated by MMCA
Allocated by MMCA
Standard MMC
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
181
Size (bytes)
3
R/W
R
R
R
R
RO
R/W
R/W
WO
Cell type
Command set
[200]
[199:197]
[196]
[195]
[194]
[193]
[192]
[191]
[190]
[189]
[188]
[187]
[186]
[185]
[184]
[183]
[182]
[180:0]
CSD-slice
Device registers
00
TBD
01
TBD
02
TBD
01
00
TBD
00
TBD
00
TBD
00
TBD
00
TBD
TBD
value
CSD-
slice
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