NAND08GAH0A NUMONYX [Numonyx B.V], NAND08GAH0A Datasheet - Page 58
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NAND08GAH0A
Manufacturer Part Number
NAND08GAH0A
Description
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.NAND08GAH0A.pdf
(116 pages)
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Device registers
8.3.2
8.3.3
8.3.4
58/116
SPEC_VERS
Defines the MultiMediaCard system specification version supported by the device.
Table 36.
TAAC
Defines the asynchronous part of the data access time.
Table 37.
NSAC
Defines the typical case for the clock dependent factor of the data access time. The unit for
NSAC is 100 clock cycles. Therefore, the maximal value for the clock dependent part of the
data access time is 25.5k clock cycles.
The total access time N
on TAAC and NSAC. It has to be computed by the host for the actual clock rate. The read
access time should be interpreted as a typical delay for the first data bit of a data block.
TAAC bit position
SPEC_VERS
2:0
6:3
7
5 - 15
System specification version
TAAC access time definition
0
1
2
3
4
Time unit
0=1 ns, 1=10 ns, 2=100 ns, 3=1 µs, 4=10 µs, 5=100 µs, 6=1 ms, 7=10 ms
Multiplier factor
0=reserved, 1=1.0, 2=1.2, 3=1.3, 4=1.5, 5=2.0, 6=2.5, 7=3.0, 8=3.5, 9=4.0,
A=4.5, B=5.0, C=5.5, D=6.0, E=7.0, F=8.0
Reserved
AC
as expressed in the
Allocated by MMCA
Allocated by MMCA
Allocated by MMCA
Allocated by MMCA
Version 4.1 - 4.2
Reserved
System specification version number
Table 61: Timing values
Code
NAND08GAH0A, NAND16GAH0D
is calculated based
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