NAND08GAH0A NUMONYX [Numonyx B.V], NAND08GAH0A Datasheet - Page 62

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NAND08GAH0A

Manufacturer Part Number
NAND08GAH0A
Description
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet

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Device registers
8.3.16
8.3.17
8.3.18
8.3.19
8.3.20
8.3.21
62/116
ERASE_GRP_SIZE
The contents of this register is a 5 bit binary coded value used to calculate the size of the
erasable unit of the device. The size of the erase unit (also referred to as erase group) is
determined by the ERASE_GRP_SIZE and the ERASE_GRP_MULT entries of the CSD,
using the following equation:
size of erasable unit = (ERASE_GRP_SIZE+1) * (ERASE_GRP_MULT +1)
This size is given as the minimum number of write blocks that can be erased in a single
erase command.
ERASE_GRP_MULT
A 5 bit binary coded value used for calculating the size of the erasable unit of the device.
See
WP_GRP_SIZE
The size of a write protected group. The contents of this register is a 5 bit binary coded
value, defining the number of erase groups that can be write protected. The actual size is
computed by increasing this number by one. A value of zero means 1 erase group, 31
means 32 erase groups.
WP_GRP_ENABLE
A value of ‘0’ means no group write protection possible.
DEFAULT_ECC
Set by the device manufacturer. It defines the ECC code which is recommended for use.
The field definition is the same as for the ECC field described later.
R2W_FACTOR
Defines the typical block program time as a multiple of the read access time. The following
table defines the field format.
Table 45.
Section 8.3.16: ERASE_GRP_SIZE
R2W_FACTOR
R2W_FACTOR
0
1
2
3
4
5
6
7
1
2 (write half as fast as read)
4
8
16
32
64
128
for detailed description.
Multiples of read access time
NAND08GAH0A, NAND16GAH0D

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