NCP1216AD100 ONSEMI [ON Semiconductor], NCP1216AD100 Datasheet - Page 12

• Manufacturer Part Number: NCP1216AD100
• Description: PWM Current-Mode Controller for High-Power Universal Off-Line Supplies
• Manufacturer: ONSEMI [ON Semiconductor]

Non−Latching Shutdown
temporarily and authorize its restart once the default has
disappeared. This option can easily be accomplished
through a single NPN bipolar transistor wired between FB
and ground. By pulling FB below the Adj pin 1 level, the
output pulses are disabled as long as FB is pulled below
pin 1. As soon as FB is relaxed, the IC resumes its operation.
Figure 24 depicts the application example:
protection, is described in application note AND8069/D.
Power Dissipation
through the internal DSS circuitry. The current flowing
through the DSS is therefore the direct image of the
NCP1216 current consumption. The total power dissipation
can be evaluated using:
which is, as we saw, directly related to the MOSFET Q
we operate the device on a 90−250 VAC rail, the maximum
rectified voltage can go up to 350 VDC. However, as the
characterization curves show, the current consumption
drops at a higher junction temperature, which quickly occurs
300
200
100
(V HVDC * 11 V)
Figure 23. The Skip Cycle Takes Place at Low Peak
0
In some cases, it might be desirable to shut off the part
A full latching shutdown, including overtemperature
The NCP1216 is directly supplied from the DC rail
Currents which Guarantees Noise Free Operation
Figure 24. Another Way of Shutting Down the IC
315.4U
without a Definitive Latchoff State
ON/OFF
Max Peak
Current
882.7U
I CC2
1.450M
Q1
2.017M
Current Limit
Skip Cycle
1
2
3
4
NCP1216, NCP1216A
2.585M
(eq. 10)
http://onsemi.com
g
8
7
6
5
. If
12
due to the DSS operation. In our example, at
T
10 A / 600 V MOSFET. As a result, the NCP1216 will
dissipate from a 250 VAC network,
The PDIP−7 package offers a junction−to−ambient thermal
resistance R
around the PCB footprint will help decreasing this number:
12 mm x 12 mm to drop R
copper thickness (1 oz.) or 6.5 mm x 6.5 mm with 70 m
copper thickness (2 oz.). For a SOIC−8, the original
178 C/W will drop to 100 C/W with the same amount of
copper. With this later PDIP−7 number, we can compute the
maximum power dissipation that the package accepts at an
ambient of 50 C:
which barely matches our previous budget. Several
solutions exist to help improving the situation:
1. Insert a Resistor in Series with Pin 8: This resistor will
take a part of the heat normally dissipated by the NCP1216.
Calculations of this resistor imply that V
below 30 V in the lowest mains conditions. Therefore, R
can be selected with:
In our case, V
dropping resistor of 8.7 kW. With the above example in
mind, the DSS will exhibit a duty−cycle of:
By inserting the 8.7 kW resistor, we drop
during the DSS activation. The power dissipated by the
NCP1216 is therefore:
We can pass the limit and the resistor will dissipate
or
2. Select a MOSFET with a Lower Q
exhibit different total gate charges depending on the
technology they use. Careful selection of this component
can help to significantly decrease the dissipated heat.
3. Implement Figure 3, from AN8069/D, Solution: This is
another possible option to keep the DSS functionality (good
short−circuit protection and EMI jittering) while driving any
types of MOSFETs. This solution is recommended when the
designer plans to use SOIC−8 controllers.
P instant * DSS duty * cycle +
ambient
350 V
P max +
R drop v
2.9 mA 8 mA + 36%
8.7 kW * 8 mA + 69.6 V
1 W * 800 mW + 200 mW
p drop + 69
(350 * 69) * 8 m * 0.36 + 800 mW
= 50 C, I
2.9 mA@T A + 50 C + 1 W
8.7 k
T Jmax * T Amax
V bulkmin * 50 V
qJ−A
2
bulk
R qJ * A
* 0.36
of 100 C/W. Adding some copper area
8 mA
CC2
minimum is 120 VDC, which leads to a
is measured to be 2.9 mA with a
qJ−A
+ 1 W
down to 75 C/W with 35 m
g
: Certain MOSFETs
pin8
does not drop
(eq. 12)
(eq. 13)
(eq. 14)
(eq. 15)
(eq. 16)
(eq. 17)
(eq. 18)
(eq. 11)
drop