NCP1381 ONSEMI [ON Semiconductor], NCP1381 Datasheet - Page 16

• Manufacturer Part Number: NCP1381
• Description: Low−Standby High Performance PWM Controller
• Manufacturer: ONSEMI [ON Semiconductor]

External Latchoff
is permanently latched. That is to say, Pin 9 goes low, the
GTS pin no longer supplies the PFC and the V
to 6 V. The latch reset occurs when V
voltage pins implies some precaution when triggering the
latch voltage. The cheapest option is obtained when wiring
a simple zener diode in series with the monitored line. Care
must be taken to limit the excursion of the skip pin before
fully latching the controller.
Demag
Latch
Figure 22. Plateau Sensing Overvoltage Protection
By lifting up Pin 5 above V
Keep in mind that the 5 V maximum limit on all low
V
latchdem
V
Figure 24. Wiring a PNP Transistor on the Skip Cycle Input Pin will Latch the Circuit.
+
−
latch
+
Skip
+
OVP
V
latch
max
+
−
< 5 V!
(3.5 V typical), the circuit
To Demag
Comp.
CC
Latch
1 Shot
Timer
DRV
falls below 4 V, e.g.
CC
is clamped
http://onsemi.com
Latch
Input
+
−
NCP1381
Skip
16
+
V
V
latch
when the user unplugs the converter from the mains.
Figure 24 shows several options on how to connect a PNP
to implement an OVP or Overtemperature Protection
(OTP).
Go−To−Standby detection
the Flyback converter and keeps the mains power factor
close to unity. However, in standby, this PFC stage is no
longer needed and must be turned off to save watts and thus
reduce the no−load standby power. To detect when the
converter enters standby, the controller observes the voltage
available on Pin 1: typically, a portion of the feedback
voltage will be used. In higher power conditions, this level
ref
−100
The PFC front−end stage delivers an elevated voltage to
700
500
300
100
Figure 23. Typical Sensed Waveforms
58.5
OVP
62.5
T
TIME (mS)
samp
66.5
Skip
V
70.4
ref
74.4
NTC