NCP1611ADR2G ONSEMI [ON Semiconductor], NCP1611ADR2G Datasheet
NCP1611ADR2G
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NCP1611ADR2G Summary of contents
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NCP1611 Enhanced, High-Efficiency Power Factor Controller The NCP1611 is designed to drive PFC boost stages based on an innovative Current Controlled Frequency Fold−back (CCFF) method. In this mode, the circuit classically operates in Critical conduction Mode (CrM) when the inductor ...
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line bo1 EMI Filter bo2 MAXIMUM RATINGS TABLE Symbol Pin CONTROL DRV 6 Power Dissipation and ...
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TYPICAL ELECTRICAL CHARACTERISTICS TABLE specified) Symbol START−UP AND SUPPLY CIRCUIT V Start−Up Threshold, V CC(on) V Minimum Operating Voltage, V CC(off) V CC(HYST) I CC(start) I Operating Consumption, no switching (V CC(op)1 I Operating Consumption, 50 kHz switching, no load ...
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TYPICAL ELECTRICAL CHARACTERISTICS TABLE specified) Symbol CURRENT SENSE AND ZERO CURRENT DETECTION BLOCKS T Over−Current Protection Leading Edge Blanking Time (guaranteed by design) LEB,OCP T “Overstress” Leading Edge Blanking Time (guaranteed by design) LEB,OVS Over−Current Protection Delay from V T ...
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TYPICAL ELECTRICAL CHARACTERISTICS TABLE specified) Symbol BROWN−OUT PROTECTION AND FEED−FORWARD I V CONTROL(BO) control V Comparator Threshold for Line Range Detection Comparator Threshold for Line Range Detection Comparator Hysteresis for Line Range Detection HL(hyst) ...
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DETAILED PIN DESCRIPTION Pin Number Name The error amplifier output is available on this pin. The network connected between this pin and ground adjusts the regulation loop bandwidth that is typically set below achieve high 1 V ...
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Figure 2. Block Diagram http://onsemi.com 7 ...
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T , JUNCTION TEMPERATURE (°C) J Figure 3. Start−Up Threshold vs. Temperature (A Version) CC(on) 10.00 9.75 9.50 9.25 9.00 8.75 8.50 8.25 8.00 ...
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T , JUNCTION TEMPERATURE (°C) J Figure 9. FFcontrol Pin Current, V 1.4 V and V Maximum vs. Temperature CONTROL 22.5 20.5 18.5 16.5 14.5 ...
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T , JUNCTION TEMPERATURE (°C) J Figure 15. DRV Source Resistance vs. Temperature −50 −30 − ...
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T , JUNCTION TEMPERATURE (°C) J Figure 21. Error Amplifier Transconductance Gain vs. Temperature 0.5 0.4 0.3 0.2 0.1 0 −50 −30 − JUNCTION ...
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T , JUNCTION TEMPERATURE (°C) J Figure 27. “Overstress” Protection Leading Edge Blanking vs. Temperature 850 800 750 700 650 −50 −30 − ...
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T , JUNCTION TEMPERATURE (°C) J Figure 33. CS/ZCD Pin Bias Current @ V = 0.75 V vs. Temperature 960 920 880 840 ...
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T , JUNCTION TEMPERATURE (°C) J Figure 39. Maximum On Time @ V 1.4 V vs. Temperature 100 −50 ...
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T , JUNCTION TEMPERATURE (°C) J Figure 45. Ratio (Fast OVP Threshold, V Rising) over V vs. Temperature REF 290 270 250 230 210 190 ...
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T , JUNCTION TEMPERATURE (°C) J Figure 51. Brown−Out Threshold, V Falling vs. Temperature −50 −30 − JUNCTION TEMPERATURE ...
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T , JUNCTION TEMPERATURE (°C) J Figure 57. Blanking Time for Line Range Detection vs. Temperature Introduction The NCP1611 is designed to optimize the efficiency of your PFC ...
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Maximum Current Limit: the circuit senses the MOSFET current and turns off the power switch if the set current limit is exceeded. In addition, the circuit enters a low duty−cycle operation mode when the current reaches 150% of the ...
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Top: CrM operation when the current information exceeds the preset level during the demagnetization phase Middle: the circuit re−starts at the next valley if the sum (ramp + current information) exceeds the preset level during the dead−time, while the drain−source ...
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V pin BO pin SENSE V pin Vcontrol pin CONTROL FFcontrol pin FFcontrol pin R FF Figure 61. Generation of the Current Information Skip Mode As illustrated in Figure 61, the circuit also skips cycles near the line zero crossing ...
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CCFF maximizes the efficiency at both nominal and light load. In particular, the stand−by losses are reduced to a minimum. Also, this method avoids that the system stalls between valleys. Instead, the circuit acts so that the PFC Figure 63. ...
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In some cases, the system enters then the dead−time (t lasts until the next clock is generated. One can show that the ac line current is given by ...
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Hence, the maximum power that can be delivered by the PFC stage is in,rms P + in,avg max low line 2 V in,rms P + in,avg max high line Figure ...
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The output of the error amplifier is brought to pin 1 for external loop compensation. Typically a type 2 network is applied between pin1 and ground, to set the regulation bandwidth below about 20 Hz and to provide a decent ...
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OCP signal turns high to reset the PWM latch and forces the driver low. A 200 ns blanking time prevents the OCP comparator from tripping because of the switching spikes that occur when the MOSFET turns on. The CS pin ...
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V avoids a line current CONTROL discontinuity and limits the risk of false triggering. Pin2 is also used to sense the line for feed−forward. A similar method is used: − The V pin voltage is compared to ...
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... Such open/short situations are generally required not to cause fire, ORDERING INFORMATION Device NCP1611ADR2G NCP1611BDR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ...
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0.25 (0.010 −Y− −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting ...