NCP5331_05 ONSEMI [ON Semiconductor], NCP5331_05 Datasheet
NCP5331_05
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NCP5331_05 Summary of contents
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NCP5331 Two−Phase PWM Controller with Integrated Gate Drivers The NCP5331 is a second−generation, two−phase, buck controller that incorporates advanced control functions to power 64−bit AMD Athlont processors and low voltage, high current power supplies. Proprietary multiphase architecture guarantees balanced load−current ...
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NCP5331 PIN CONNECTIONS LQFP− DRP LGND 3 22 CS1 REF CS2 FFB ...
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Recommended Components: Q1, Q4: ON Semiconductor NTD60N03 ( 6.1 mW) Q5 Q9: ON Semiconductor NTD80N02 ( 5.0 mW) L1, L2: Coiltronics CTX22−15274 or T50−8B/ #16 AWG Bifilar (1 mW) L3: ...
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MAXIMUM RATINGS* Operating Junction Temperature Lead Temperature Soldering SMD Reflow Profile (60 seconds maximum) Storage Temperature Range Package Thermal Resistance: Junction−to−Ambient, R ESD Susceptibility (Human Body Model) JEDEC Moisture Sensitivity *The maximum package power dissipation must be observed. MAXIMUM RATINGS ...
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ELECTRICAL CHARACTERISTICS 9.0 V < < 3.3 nF, R CCL1 CCL2 GATE = 1.0 mF, 0. 1.0 V; unless otherwise noted) VCC LIM Characteristic Voltage Identification DAC Voltage Identification (VID) ...
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ELECTRICAL CHARACTERISTICS (continued) 9.0 V < < 3.3 nF, R CCL1 CCL2 GATE = 1.0 mF, 0. 1.0 V; unless otherwise noted) VCC LIM Characteristic Voltage Identification DAC (continued) −SEN ...
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ELECTRICAL CHARACTERISTICS (continued) 9.0 V < < 3.3 nF, R CCL1 CCL2 GATE = 1.0 mF, 0. 1.0 V; unless otherwise noted) VCC LIM Characteristic Overcurrent Shutdown Timer (continued) Overcurrent ...
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ELECTRICAL CHARACTERISTICS (continued) 9.0 V < < 3.3 nF, R CCL1 CCL2 GATE = 1.0 mF, 0. 1.0 V; unless otherwise noted) VCC LIM Characteristic Current Sensing CS1−CS2 Input Bias ...
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PACKAGE PIN DESCRIPTION Pin No. Symbol 1 V Voltage Feedback Pin. To use Adaptive Voltage Positioning (AVP), set the light load offset voltage FB by connecting a resistor between V the offset. For no adaptive positioning connect ...
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NCP5331 Non−Overlap Non−Overlap Figure 2. Block Diagram, Control Functions http://onsemi.com 10 ...
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NCP5331 Figure 3. Block Diagram, Protection http://onsemi.com 11 ...
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V −V ID0 Figure 4. Simplified VID Pin Input Circuitry TYPICAL PERFORMANCE CHARACTERISTICS 600 550 500 450 400 350 300 250 200 150 100 (k) OSC Figure 5. Oscillator Frequency vs. R 650 600 550 ...
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TYPICAL PERFORMANCE CHARACTERISTICS 4.8 4.7 4.6 4.5 4.4 4.3 4.2 4.1 4.0 3 Temperature ( C) Figure 8. CSA to V Gain vs. Temperature DRP 14.0 13.5 13.0 12.5 12.0 11.5 11.0 10.5 10.0 9.5 ...
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Overview The NCP5331 dc/dc controller utilizes an Enhanced V topology to meet requirements of low voltage, high current loads with fast transient requirements. Transient response has been improved and voltage jitter virtually eliminated by including an internal PWM ramp, connecting ...
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SWNODE Lx RLx V OUT (V ) CORE + 2 Figure 15. Enhanced V Control Employing Lossless Inductive Current Sensing and Internal Ramp with higher current, the PWM cycle will terminate earlier providing negative feedback. The NCP5331 provides a CSx ...
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SWNODE OUT Internal Ramp CSA Out w/ Exaggerated Delays COMP−Offset CSA Out + Ramp + CS REF T1 Figure 16. Open Loop Operation microseconds of a transient before the feedback loop has repositioned the COMP pin. ...
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Figure 17. Inductive Sensing Waveform During a Load Step with Fast RC Time Constant (50 ms/div) Figure 18. Hiccup Mode Operation Figure 19. Overcurrent Timer Operation NCP5331 The waveforms in Figure 17 show a simulation of the current sense signal ...
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NOTE: Using the lower MOSFETs to prevent overvoltage is not adequate if the MOSFETs are turned OFF at the UVLO threshold − V reaches 4.0 V within CORE 100 ms. Figure 20. Overvoltage Occurs with UVLO Enabled Overvoltage Protection The ...
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NOTE: The NCP5331 maintains V CORE upper MOSFET shorts during no−load operation. Figure 22. NCP5331 Prevents Overvoltage the voltage feedback signal (COREFB+) is accidentally grounded (but V is not), the error amplifier will respond CORE by ...
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During no load conditions the V DRP voltage as the V pin, so none of the V FB through the V resistor. When output current increases DRP the V pin increases proportionally and the V DRP current offsets the V ...
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V and “timing out” The current delivered to the C capacitor ( function of the R PGD PGD according to the following equation. I PGD + 0. OSC The programmed delay ...
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Power Dissipation NCP5331 power dissipation may be approximated by the following equation: P loss + F SW · (V CCH · Q THighFETs ) V CCLx · Q TLowFETs ) ) P Quiescent where: P Quiescent + V CCL · ...
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Layout Guidelines With the fast rise, high output currents of microprocessor applications, parasitic inductance and resistance should be considered when laying out the power, filter and feedback signal sections of the board. Typically, a multilayer board with at least one ...
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The CS sense point should be equidistant REF between the output inductors to equalize the PCB resistance added to the current sense paths. This will insure acceptable current sharing. Also, route the CS connection away from noisy traces such ...
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For increasing current Dt INC + CORE ) For decreasing current Dt DEC + CORE ) For typical processor applications with output voltages less than half the ...
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MAX dI/dt occurs in first few PWM cycles Vi TBD 5 16MBZ1500M10X20 + Vi − ESR 13 m Input Inductor Selection The use of an inductor ...
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MOSFET and Heatsink Selection Power dissipation, package size, and thermal solution drive MOSFET selection. To adequately size the heat sink, the design must first predict the MOSFET power dissipation. Once the dissipation is known, the heat sink thermal impedance ...
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For TO−220 and TO−263 packages, standard FR−4 copper clad circuit boards will have approximate thermal resistances ( shown in the following table. SA Pad Size Single−Sided 2 2 (in / oz. Copper 0.5/323 60−65 C/W 0.75/484 ...
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MAX MAX C NOTE: The RC time constant of the current sense network is too long (slow); V and V DRP CORE Figure 35. V Tuning, RC Time Too ...
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NOTE: The value too high and the loop gain/ A1 bandwidth too low. COMP slews too slowly which results in overshoot CORE Figure 38. COMP Tuning, Bandwidth Too Low NOTE: The value of C ...
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Also, depending on the current sense points, the circuit board may add additional resistance. In general, the temperature coefficient of copper is +0.393% per C. If using a ...
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Output Inductor Selection Calculate the minimum output inductance at I according to Equation 3 with 20% inductor ripple current ( = 0.15 OUT ) @ V OUT Lo MIN + ( O,MAX @ ...
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First, use Equation 15 to calculate the voltage across the output inductor due to the 52 A load current being shared equally between the two phases CORE,NO−LOAD ) (I O,MAX 2) @ ESR ...
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Equation 28 is used to calculate the heat sink thermal impedances necessary to maintain less than the specified maximum junction temperatures ambient. q CNTRL SA t (120 * 55°C) 1. 1.65° 42.3°C W ...
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V ILIM + (I OUT,LIM ) LMAX ) R PCB,MAX ) @ G ILIM + ( 7. (1. 0.26 mW 1.4 Vdc Set ...
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−T− DETAIL −Z− −AB− SEATING −AC− PLANE 0.10 (0.004 DETAIL trademark ...