STTS2002_11 STMICROELECTRONICS [STMicroelectronics], STTS2002_11 Datasheet - Page 26

• Manufacturer Part Number: STTS2002_11
• Description: 2.3 V memory module temperature sensor with a 2 Kb SPD EEPROM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Temperature sensor registers
Table 15.
4.4.1
4.4.2
Table 16.
1. Bit 2 is LSB for default 10-bit mode.
2. Depending on status of the resolution register, bit 1 may display 0.125 °C value.
3. Depending on status of the resolution register, bit 0 may display 0.0625 °C value.
Table 17.
1. Bit 2 is LSB for default 10-bit mode.
2. Depending on status of the resolution register, bit 1 may display 0.125 °C value.
3. Depending on status of the resolution register, bit 0 may display 0.0625 °C value.
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P3
Bit
Bit
15
15
0
0
0
0
0
P2
0
0
1
Bit
Bit
14
14
0
0
Temperature trip point register format
Alarm window trip
The device provides a comparison window with an upper temperature trip point in the alarm
upper boundary register, and a lower trip point in the alarm lower boundary register. When
enabled, the event output will be triggered whenever entering or exiting (crossing above or
below) the alarm window.
Critical trip
The device can be programmed in such a way that the event output is only triggered when
the temperature exceeds the critical trip point. The critical temperature setting is
programmed in the critical temperature register. When the temperature sensor reaches the
critical temperature value in this register, the device is automatically placed in comparator
mode, which means that the critical event output cannot be cleared by using software to set
the clear event bit.
Alarm temperature upper boundary register format
Alarm temperature lower boundary register format
P1
1
1
0
Bit
13
Bit
13
0
0
P0
0
1
0
Sign
MSB
Sign
MSB
Bit
12
Bit
12
UPPER
LOWER
CRITICAL
Name
Bit
11
Bit
11
Bit
10
Bit
Alarm window upper boundary temperature
10
Alarm temperature upper boundary
Alarm temperature lower boundary
Critical temperature
Alarm window lower boundary temperature
Bit
Bit
9
9
Doc ID 15389 Rev 5
Register description
Bit
Bit
8
8
Bit
Bit
7
7
Bit
Bit
6
6
Bit
5
Bit
5
Bit
4
Bit
4
Width
(bits)
16
16
16
Bit
3
Bit
3
(R/W)
Type
LSB
R/W
R/W
R/W
LSB
Bit
2
Bit
2
(1)
(1)
Default state
Bit
Bit
1
0
STTS2002
1
0
(POR)
(2)
00 00
00 00
00 00
(2)
Bit
Bit
0
0
0
0
(3)
(3)