IP200 ETC [List of Unclassifed Manufacturers], IP200 Datasheet - Page 18

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IP200

Manufacturer Part Number
IP200
Description
Interpolation Circuit for Incremental Measuring Systems
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet

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CFG1
ERRMASK
SYNC
D-09116 Chemnitz, Germany
Zwickauer Straße 227
Read Address
Write Address
Default
DISREG
TRSLP
DISREF
Read Address
Write Address
Default
GCOMP
OCOMP
BQLOW
ADCOVL
FAST1
FAST2
HOLD
LATCH
For detailed Information about the meaning of the bits refere to chapter 8.
For square wave operation (A/B-Signals) it is recommended to set the error mask register to 0x3F or
0xFF respectively, in counter mode use the error mask register loaded with 0xDF and set the SPEED
bit in the CFG0 register.
Write Address
Default
ASYNC
SYNCVAL
For more detailed information about the functions of these bits refer to chapter 5.2.3
*)
GEMAC
Latch
ASYNC
Gesellschaft für
Mikroe lektronikanwendung Chemnitz mbH
Bits must remain unchanged in order to guarantee the correct functioning of the IC
7
7
1
0
Hold
6
6
0
Configuration Register 1
0
1
0
1
0
1
Error Mask Register
Enable Gain Error Detection
Enable Offset Error Detection
Enable Sensor Breakage Detection
Enable ADC Clipping Detection
Enable Speed monitoring (Counter and A/B-Signals)
Enable Speed monitoring (A/B-Signals)
Deactivate square-wave outputs in event of an error
Store error states
SPI-Synchronization Register
Import read data with SPI-RD0/ST the next time the contents of the cycle
counter and SYNCVAL are identical
Import read data always with SPI-RD0/ST
Sequential control counter compare value for SPI synchronization
00000
Fast2
7:3
5
5
0
Phone:
Fax::
Internet:
Email:
Date: 20.04.04
0x01 (Byte 2)
0x01
0x00
Internal automatic gain-offset-controller activated
Internal automatic gain-offset-controller deactivated
Trigger event occurs on the falling edge of pin TRG
Trigger event occurs on the rising edge of pin TRG
Reference point processing activated
Reference point processing deactivated
0x01 (Byte 3)
0x02
0x3F
0x03
0x00
*)
Fast1
4
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+49 371 33 77 272
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interpolation@gemac-chemnitz.de
sales@gemac-chemnitz.de
ADCOVL
3
Page 18 of 30
SYNCVAL
DISREG
BQLO
4:0
2
2
DISREF
OCOMP
1
1
Title:
Data Sheet GC-IP200
Name of Document:
43500-DB-2-1-E-IP200.pdf
TRSLP
GCOMP
0
0

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