IP200 ETC [List of Unclassifed Manufacturers], IP200 Datasheet - Page 23

• Manufacturer Part Number: IP200
• Description: Interpolation Circuit for Incremental Measuring Systems
• Manufacturer: ETC [List of Unclassifed Manufacturers]

9.3
10 Signal Propagation Time
The delay time between the sampling point of the analogue input signals (sine/cosine) and the availability of
the interpolation result (i.e. related to trigger) totals 90 system clocks. The delay time between sampling and
updating the data registers and those values available via parallel or serial interface, respectively, totals 96
system clocks. If a external counter unit connected to the A/B/OREF outputs is used, the time between
sampling and output of resulting square waves totals 122 system clocks.
Every 32nd system clock a new measurement result appears on the parallel data output. Note that the data
transferring time of the used interface is added to the IP200 internal system propagation time.

Note that the constant delay time of the IC (as with any other digital signal processing systems)
result in a frequency-dependent phase shift between the analogue input signals and the output
signals (d  = 2  ·f·t
Name
IR(2:0)
IT(2:1)
IT(0)
GFE
SPEED
DISREG
DISREF
TRSLP
TSTSTRB
ERRMASK
SGAIN
SOFF
CGAIN
COFF
SYNC
D-09116 Chemnitz, Germany
Zwickauer Straße 227
Configuration Bits Defaults
Sample s(t)
ADC-Data
Trigger Event Result
DATA Register SPI / Parallel
ext. counter unit con. to A/B
Figure 14
GEMAC
Gesellschaft für
Mikroe lektronikanwendung Chemnitz mbH
v
).
Description
Interpolation Rate
Interval Time
Interval Time
Glitch-Filter-Enable
Speed-Mode for internal Counter
Disable automatic controller
Disable Index Point
Trigger Edge
Enable Strobe-Signal on pin OREF
Error Mask Register
Initial value Gain Correction, Sine
Initial value Offset Correction, Sine
Initial value Gain Correction, Cosine
Initial value Offset Correction, Cosine
SPI synchronisation with internal
sequential control counter
32x SYSCLK
Phone:
Fax::
Internet:
Email:
Date: 20.04.04
X(N-4)
N
N-3
N-1
N-3
26x SYSCLK
Index Point
X(N-3)
[phone] - 0
[phone]
www.gemac-chemnitz.de
[e-mail]
[e-mail]
N+1
N-2
N-2
N
X(N-2)
N+2
A
B
X(N-1)-1
N-1
Page 23 of 30
N+1
N-1
X(N-1)
X(N-1)
X(N-1)+1
N+3
N
N+2
X(N-1)+2
N
Default
Pin IR(2:0)is read
Pin IT(2:1)is read
0
Pin TRG/GFE is read
Pin SDI/SPEED is read
0
0
0
0
0x3F
0x80
0x00
0x80
0x00
0x00
X(N)
N+4
N+1
X(N-1)+3
Title:
Data Sheet GC-IP200
Name of Document:
43500-DB-2-1-E-IP200.pdf
N+3
N+1
X(N+1)
N+5
N+2
Index Point:
OREF is H
N+4
N+2
X(N+2)
N+6