DSPIC30F MICROCHIP [Microchip Technology], DSPIC30F Datasheet - Page 239

• Manufacturer Part Number: DSPIC30F
• Description: General Purpose and Sensor Families High-Performance Digital Signal Controllers
• Manufacturer: MICROCHIP [Microchip Technology]

INDEX
Numerics
12-bit Analog-to-Digital Converter (A/D) Module .............. 145
A
A/D .................................................................................... 145
AC Characteristics ............................................................ 195
AC Temperature and Voltage Specifications .................... 195
AC-Link Mode Operation .................................................. 142
Address Generator Units .................................................... 47
Alternate Vector Table ........................................................ 59
Analog-to-Digital Converter. See A/D.
Assembler
Automatic Clock Stretch.................................................... 110
B
Bandgap Start-up Time
Barrel Shifter ....................................................................... 33
Bit Reversed Addressing
Bit-Reversed Addressing .................................................... 53
Block Diagrams
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Aborting a Conversion .............................................. 147
ADCHS Register ....................................................... 145
ADCON1 Register..................................................... 145
ADCON2 Register..................................................... 145
ADCON3 Register..................................................... 145
ADCSSL Register ..................................................... 145
ADPCFG Register..................................................... 145
Configuring Analog Port Pins.............................. 76, 150
Connection Considerations....................................... 150
Conversion Operation ............................................... 146
Effects of a Reset...................................................... 149
Operation During CPU Idle Mode ............................. 149
Operation During CPU Sleep Mode.......................... 149
Output Formats ......................................................... 149
Power-down Modes .................................................. 149
Programming the Sample Trigger............................. 147
Register Map............................................................. 151
Result Buffer ............................................................. 146
Sampling Requirements............................................ 148
Selecting the Conversion Clock ................................ 147
Selecting the Conversion Sequence......................... 146
Load Conditions ........................................................ 195
16-bit Mode ............................................................... 142
20-bit Mode ............................................................... 142
MPASM Assembler................................................... 177
During 10-bit Addressing (STREN = 1)..................... 110
During 7-bit Addressing (STREN = 1)....................... 110
Receive Mode ........................................................... 110
Transmit Mode .......................................................... 110
Requirements............................................................ 200
Timing Characteristics .............................................. 200
Example ...................................................................... 54
Implementation ........................................................... 53
Modifier Values Table ................................................. 54
Sequence Table (16-Entry)......................................... 54
12-bit A/D Functional ................................................ 145
16-bit Timer1 Module .................................................. 81
16-bit Timer2............................................................... 87
16-bit Timer3............................................................... 87
16-bit Timer4............................................................... 92
16-bit Timer5............................................................... 92
32-bit Timer2/3............................................................ 86
32-bit Timer4/5............................................................ 91
Preliminary
BOR Characteristics ......................................................... 194
BOR. See Brown-out Reset.
Brown-out Reset
C
C Compilers
CAN Module ..................................................................... 123
CLKOUT and I/O Timing
Code Examples
Code Protection ................................................................ 153
Core Architecture................................................................ 21
D
Data Accumulators and Adder/Subtractor .......................... 31
Data Address Space........................................................... 39
CAN Buffers and Protocol Engine ............................ 124
DCI Module............................................................... 136
Dedicated Port Structure ............................................ 75
DSP Engine ................................................................ 29
dsPIC30F5013/6013/6014.......................................... 18
External Power-on Reset Circuit .............................. 162
I
Input Capture Mode.................................................... 95
Oscillator System...................................................... 155
Output Compare Mode ............................................... 99
Reset System ........................................................... 159
Shared Port Structure................................................. 76
SPI............................................................................ 104
SPI Master/Slave Connection................................... 104
UART Receiver......................................................... 116
UART Transmitter..................................................... 115
Characteristics.......................................................... 193
Timing Requirements ............................................... 200
MPLAB C17.............................................................. 178
MPLAB C18.............................................................. 178
MPLAB C30.............................................................. 178
Baud Rate Setting .................................................... 128
CAN1 Register Map.................................................. 130
CAN2 Register Map.................................................. 132
Frame Types ............................................................ 123
I/O Timing Characteristics ........................................ 217
Message Reception.................................................. 126
Message Transmission............................................. 127
Modes of Operation .................................................. 125
Overview................................................................... 123
Characteristics.......................................................... 198
Requirements ........................................................... 198
Data EEPROM Block Erase ....................................... 70
Data EEPROM Block Write ........................................ 72
Data EEPROM Read.................................................. 69
Data EEPROM Word Erase ....................................... 70
Data EEPROM Word Write ........................................ 71
Erasing a Row of Program Memory ........................... 65
Initiating a Programming Sequence ........................... 66
Loading Write Latches................................................ 66
Overview..................................................................... 21
Data Space Write Saturation ...................................... 33
Overflow and Saturation ............................................. 31
Round Logic ............................................................... 32
Write Back .................................................................. 32
Alignment.................................................................... 40
Alignment (Figure) ...................................................... 40
Effect of Invalid Memory Accesses (Table) ................ 40
MCU and DSP (MAC Class) Instructions Example .... 43
Memory Map............................................................... 40
Near Data Space ........................................................ 41
2
C ............................................................................ 108
dsPIC30F
DS70083G-page 237