AT90PWM2B-16SE ATMEL [ATMEL Corporation], AT90PWM2B-16SE Datasheet - Page 181

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AT90PWM2B-16SE

Manufacturer Part Number
AT90PWM2B-16SE
Description
8-bit Microcontroller with 8K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
17.3
4317J–AVR–08/10
Data Modes
• Bits 7:0 - SPD7:0: SPI Data
The SPI Data Register is a read/write register used for data transfer between the Register File
and the SPI Shift Register. Writing to the register initiates data transmission. Reading the regis-
ter causes the Shift Register Receive buffer to be read.
There are four combinations of SCK phase and polarity with respect to serial data, which are
determined by control bits CPHA and CPOL. The SPI data transfer formats are shown in
17-3
nal, ensuring sufficient time for data signals to stabilize. This is clearly seen by summarizing
Table 17-2
Table 17-5.
Figure 17-3. SPI Transfer Format with CPHA = 0
and
CPOL=0, CPHA=0
CPOL=0, CPHA=1
CPOL=1, CPHA=0
CPOL=1, CPHA=1
Figure
and
SCK (CPOL = 0)
mode 0
SCK (CPOL = 1)
mode 2
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
CPOL Functionality
SS
Table
MSB first (DORD = 0)
LSB first (DORD = 1)
17-4. Data bits are shifted out and latched in on opposite edges of the SCK sig-
17-3, as done below:
MSB
LSB
Sample (Falling)
Sample (Rising)
Leading Edge
Setup (Falling)
Setup (Rising)
Bit 6
Bit 1
Bit 5
Bit 2
Bit 4
Bit 3
AT90PWM2/3/2B/3B
Sample (Falling)
Sample (Rising)
Setup (Falling)
Setup (Rising)
Trailing eDge
Bit 3
Bit 4
Bit 2
Bit 5
Bit 1
Bit 6
SPI Mode
LSB
MSB
0
1
2
3
Figure
181

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