AT90PWM2B-16SE ATMEL [ATMEL Corporation], AT90PWM2B-16SE Datasheet - Page 44

• Manufacturer Part Number: AT90PWM2B-16SE
• Description: 8-bit Microcontroller with 8K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

8.7.3
8.7.4
8.7.5
8.7.6
8.7.7
44
AT90PWM2/3/2B/3B
Brown-out Detector
Internal Voltage Reference
Watchdog Timer
Port Pins
On-chip Debug System
mode. Refer to
Comparator.
If the Brown-out Detector is not needed by the application, this module should be turned off. If
the Brown-out Detector is enabled by the BODLEVEL Fuses, it will be enabled in all sleep
modes, and hence, always consume power. In the deeper sleep modes, this will contribute sig-
nificantly to the total current consumption. Refer to
on how to configure the Brown-out Detector.
The Internal Voltage Reference will be enabled when needed by the Brown-out Detection, the
Analog Comparator or the ADC. If these modules are disabled as described in the sections
above, the internal voltage reference will be disabled and it will not be consuming power. When
turned on again, the user must allow the reference to start up before the output is used. If the
reference is kept on in sleep mode, the output can be used immediately. Refer to
age Reference” on page 50
If the Watchdog Timer is not needed in the application, the module should be turned off. If the
Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence, always consume
power. In the deeper sleep modes, this will contribute significantly to the total current consump-
tion. Refer to
When entering a sleep mode, all port pins should be configured to use minimum power. The
most important is then to ensure that no pins drive resistive loads. In sleep modes where both
the I/O clock (clk
be disabled. This ensures that no power is consumed by the input logic when not needed. In
some cases, the input logic is needed for detecting wake-up conditions, and it will then be
enabled. Refer to the section
input buffer is enabled and the input signal is left floating or have an analog signal level close to
V
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
input buffers can be disabled by writing to the Digital Input Disable Registers (DIDR1 and
DIDR0). Refer to “Digital Input Disable Register 1– DIDR1” and “Digital Input Disable Register 0
– DIDR0” on
If the On-chip debug system is enabled by OCDEN Fuse and the chip enter sleep mode, the
main clock source is enabled, and hence, always consumes power. In the deeper sleep modes,
this will contribute significantly to the total current consumption.
CC
/2, the input buffer will use excessive power.
page 231
“Watchdog Timer” on page 50
CC
“Analog Comparator” on page 226
I/O
/2 on an input pin can cause significant current even in active mode. Digital
) and the ADC clock (clk
and
page 250
for details on the start-up time.
“I/O-Ports” on page 61
for details.
ADC
for details on how to configure the Watchdog Timer.
) are stopped, the input buffers of the device will
“Brown-out Detection” on page 48
for details on how to configure the Analog
for details on which pins are enabled. If the
“Internal Volt-
4317J–AVR–08/10
for details