P87C660X2 PHILIPS [NXP Semiconductors], P87C660X2 Datasheet - Page 37

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P87C660X2

Manufacturer Part Number
P87C660X2
Description
80C51 8-bit microcontroller family
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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In the following text, it is assumed that ENS1 = “1”.
STA
STA = “1”: When the STA bit is set to enter a master mode, the SIO1
hardware checks the status of the I2C bus and generates a START
condition if the bus is free. If the bus is not free, then SIO1 waits for
a STOP condition (which will free the bus) and generates a START
condition after a delay of a half clock period of the internal serial
clock generator.
If STA is set while SIO1 is already in a master mode and one or
more bytes are transmitted or received, SIO1 transmits a repeated
START condition. STA may be set at any time. STA may also be set
when SIO1 is an addressed slave.
2003 Oct 02
80C51 8-bit microcontroller family
RAM, low voltage (2.7 to 5.5 V), low power, high speed (30/33
MHz), two 400KB I
, THE
SHIFT ACK & S1DAT
(1) Valid data in S1DAT
(2) Shifting data in S1DAT and ACK
(3) High level on SDA
START F
SHIFT BSD7
S1DAT
BSD7
LAG
SDA
SCL
SDA
ACK
SCL
2
C interfaces
LOADED BY THE CPU
(1)
D7
D7
(2)
(2)
D6
D6
SHIFT PULSES
16 KB OTP/ROM, 512B
(2)
(2)
Figure 20. Serial Input/Output Configuration
Figure 21. Shift-in and Shift-out Timing
D5
D5
BSD7
(2)
(2)
D4
D4
(2)
(2)
INTERNAL BUS
37
D3
D3
STA = “0”: When the STA bit is reset, no START condition or
repeated START condition will be generated.
STO
STO = “1”: When the STO bit is set while SIO1 is in a master mode,
a STOP condition is transmitted to the I
condition is detected on the bus, the SIO1 hardware clears the STO
flag. In a slave mode, the STO flag may be set to recover from an
error condition. In this case, no STOP condition is transmitted to the
I
condition has been received and switches to the defined “not
addressed” slave receiver mode. The STO flag is automatically
cleared by hardware.
2
S1DAT
(2)
(2)
C bus. However, the SIO1 hardware behaves as if a STOP
, THE
8
D2
D2
STOP F
(2)
(2)
D1
D1
LAG
(2)
(2)
ACK
D0
D0
(2)
(2)
P8xC660X2/661X2
(3)
A
SU00969
(1)
2
A
C bus. When the STOP
SHIFT IN
SU00970
SHIFT OUT
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