LPC2919 PHILIPS [NXP Semiconductors], LPC2919 Datasheet - Page 25

• Manufacturer Part Number: LPC2919
• Description: ARM9 microcontroller with CAN and LIN
• Manufacturer: PHILIPS [NXP Semiconductors]

NXP Semiconductors
LPC2917_19_1
Preliminary data sheet
8.4.3.2 Description
8.4.3.3 Pin description
timer has four capture inputs and/or match outputs. Connection to device pins depends on
the configuration programmed into the port function-select registers. The two timers
located in the MSCSS have no external capture or match pins, but the memory map is
identical, see
function.
The key features are:
The timers are designed to count cycles of the clock and optionally generate interrupts or
perform other actions at specified timer values, based on four match registers. They also
include capture inputs to trap the timer value when an input signal changes state,
optionally generating an interrupt. The core function of the timers consists of a 32 bit
‘prescale counter’ triggering the 32 bit ‘timer counter’. Both counters run on clock
CLK_TMRx (x runs from 0 to 3) and all time references are related to the period of this
clock. Note that each timer has its individual clock source within the Peripheral
SubSystem. In the Modulation and Sampling SubSystem each timer also has its own
individual clock source. See section
clocks.
The four timers in the peripheral subsystem of the LPC2917/19 have the pins described
below. The two timers in the modulation and sampling subsystem have no external pins
except for the pause pin on MSCSS timer 1. See
timers and their associated pins. The timer pins are combined with other functions on the
port pins of the LPC2917/19, see
runs from 0 to 3).
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32-bit timer/counter with programmable 32-bit prescaler
Up to four 32-bit capture channels per timer. These take a snapshot of the timer value
when an external signal connected to the TIMERx CAPn input changes state. A
capture event may also optionally generate an interrupt
Four 32-bit match registers per timer that allow:
– Continuous operation with optional interrupt generation on match
– Stop timer on match with optional interrupt generation
– Reset timer on match with optional interrupt generation
Up to four external outputs per timer corresponding to match registers, with the
following capabilities:
– Set LOW on match
– Set HIGH on match
– Toggle on match
– Do nothing on match
Pause input pin (MSCSS timers only)
Section
Rev. 1.01 — 15 November 2007
8.7.7. One of these timers has an external input for a pause
Section
Section 8.8.6
8.3.3. Table
ARM9 microcontroller with CAN and LIN
Section 8.7.7
for information on generation of these
Table 14
for a description of these
shows the timer pins (x
LPC2917/19
© NXP B.V. 2007. All rights reserved.
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