MC9S12A128 MOTOROLA [Motorola, Inc], MC9S12A128 Datasheet - Page 15
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MC9S12A128
Manufacturer Part Number
MC9S12A128
Description
Microcontroller unit (MCU)
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC9S12A128.pdf
(92 pages)
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Section 1 Introduction
1.1 Overview
The MC9S12A128 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip
peripherals including a 16-bit central processing unit (HCS12 CPU), 128K bytes of Flash EEPROM, 8K
bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), two
serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit
analog-to-digital converters (ADC), an 8-channel pulse-width modulator (PWM), 29 discrete digital I/O
channels (Port A, Port B, Port K and Port E), 20 discrete digital I/O lines with interrupt and wakeup
capability and an Inter-IC Bus. System resource mapping, clock generation, interrupt control and bus
interfacing are managed by the System Integration Module (SIM). The MC9S12A128 has full 16-bit data
paths throughout. However, the external bus can operate in an 8-bit narrow mode so single 8-bit wide
memory can be interfaced for lower cost systems. The inclusion of a PLL circuit allows power
consumption and performance to be adjusted to suit operational requirements.
1.2 Features
•
•
•
•
HCS12 Core
– 16-bit HCS12 CPU
– MEBI (Multiplexed External Bus Interface)
– MMC (Module Mapping Control)
– INT (Interrupt control)
– BKP (Breakpoints)
– BDM (Background Debug Mode)
CRG (low current oscillator, PLL, reset, clocks, COP watchdog, real time interrupt, clock monitor)
8-bit and 4-bit ports with interrupt functionality
– Digital filtering
– Programmable rising or falling edge trigger
Memory
– 128K Flash EEPROM
– 2K byte EEPROM
– 8K byte RAM
i. Upward compatible with M68HC11 instruction set
ii. Interrupt stacking and programmer’s model identical to M68HC11
iii. Instruction queue
iv. Enhanced indexed addressing
MC9S12A128 Device Guide — V01.01
15