TMS470R1B512 AD [Analog Devices], TMS470R1B512 Datasheet - Page 42

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TMS470R1B512

Manufacturer Part Number
TMS470R1B512
Description
16/32-Bit RISC Flash Microcontroller
Manufacturer
AD [Analog Devices]
Datasheet

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TMS470R1B512
16/32-Bit RISC Flash Microcontroller
SPNS107A – SEPTEMBER 2005 – REVISED AUGUST 2006
42
The multi-buffered A-to-D converter (MibADC) has a separate power bus for its analog circuitry that enhances
the A-to-D performance by preventing digital switching noise on the logic circuitry, which could be present on
V
AD
(1) For V
(2) Input currents into any ADC input channel outside the specified limits could affect conversion results of other channels.
(1) V
(2) 1 LSB = (AD
Resolution
Monotonic
Output conversion code
AD
AD
V
I
R
C
I
I
CR
E
E
E
AIC
AIL
ADREFHI
SS
AI
DNL
INL
I
I
TOT
REFLO
REFHI
REFLO
Table 11. Operating Characteristics Over Full Ranges of Recommended Operating Conditions
and V
CCAD
CCAD
unless otherwise noted.
= AD
CC
A-to-D high-voltage reference source
A-to-D low-voltage reference source
Analog input voltage
Analog input clamp current
(V
Analog input resistance
Analog input capacitance
Analog input leakage current
AD
Conversion range over which specified
accuracy is maintained
Differential nonlinearity error
Integral nonlinearity error
Total error/absolute accuracy
and V
, from coupling into the A-to-D analog stage. All A-to-D specifications are given with respect to
REFHI
AI
REFHI
REFHI
< V
PARAMETER
SSAD
SSAD
– AD
input current
recommended operating conditions, see the "device recommended operating conditions" table.
– 0.3 or V
REFLO
Table 10. MibADC Recommended Operating Conditions
MULTI-BUFFERED A-TO-D CONVERTER (MibADC)
)/ 2
10
AI
for the MibADC
> V
(2)
CCAD
+ 0.3)
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See
See
See
AD
AD
Difference between the actual step width
and the ideal value. See
Maximum deviation from the best straight
line through the MibADC. MibADC
transfer characteristics, excluding the
quantization error. See
Maximum value of the difference
between an analog value and the ideal
midstep value. See
REFHI
REFHI
Figure
Figure
Figure
DESCRIPTION/CONDITIONS
- AD
= 3.6 V, AD
00h to 3FFh [00 for V
18.
18.
18.
REFLO
Figure
REFLO
Figure
Figure
= V
21.
Conversion
Sampling
SSAD
20.
19.
AI
AD
V
SSAD
V
V
REFLO
MIN
SSAD
SSAD
–2
MIN
(1)
– 0.3
–1
3
; 3FF for V
10 bits (1024 values)
TYP
250
V
CCAD
V
V
MAX
CCAD
CCAD
AI
2
www.ti.com
+ 0.3
MAX UNIT
±1.5 LSB
AD
500
Assured
3.6
10
30
±2 LSB
±2 LSB
(1) (2)
1
5
REFHI
UNIT
mA
mA
pF
pF
V
V
V
V
A
]

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