HT83F10 HOLTEK [Holtek Semiconductor Inc], HT83F10 Datasheet - Page 24

• Manufacturer Part Number: HT83F10
• Description: Flash Type Voice OTP MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

Serial Interface
The device contains both SPI and I
functions, which allows two methods of easy communi-
cation with external peripheral hardware. As the SPI and
I
registers their function must first be chosen by selecting
the correct configuration option.
SPI Interface
The SPI interface is often used to communicate with ex-
ternal peripheral devices such as sensors, Flash or
EEPROM memory devices etc. Originally developed by
Motorola, the four line SPI interface is a synchronous
serial data interface that has a relatively simple commu-
nication protocol simplifying the programming require-
ments when communicating with external hardware
devices.
Rev. 1.00
2
C function share the same external pins and internal
SPI Interface Operation
The SPI interface is a full duplex synchronous serial
data link. Communication between devices con-
nected to the SPI interface is carried out in a
slave/master mode with all data transfer initiations be-
ing implemented by the master. Multiple slave devices
can be connected to the SPI serial bus with each de-
vice controlled using its slave select line. The SPI is a
four line interface with pin names SDI, SDO, SCK and
SCS. Pins SDI and SDO are the Serial Data Input and
2
C serial interface
Block Diagram
24
Serial Data Output lines, SCK is the Serial Clock line
and SCS is the Slave Select line. As the SPI interface
pins are pin-shared with segment pins and with the I
function pins, the SPI interface must first be enabled
by selecting the correct configuration option. After the
SPI configuration option has been selected it can then
also be selected using the SIMEN bit in the SIMC0
register.
The SPI function in this device offers the following fea-
tures:
Several other configuration options also exist to setup
various SPI interface options as follows:
Full duplex synchronous data transfer
Both Master and Slave modes
LSB first or MSB first data transmission modes
Transmission complete flag
SPI pin enabled
WCOL bit enabled or disabled
CSEN bit enabled or disabled
The status of the SPI interface pins is determined
by a number of factors, whether the device is in
master or slave mode and upon the condition of cer-
tain control bits such as CSEN and SIMEN.
HT83FXX
May 12, 2009
2
C