HT83F10 HOLTEK [Holtek Semiconductor Inc], HT83F10 Datasheet - Page 30

• Manufacturer Part Number: HT83F10
• Description: Flash Type Voice OTP MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

I
Communication on the I
steps, a START signal, a slave device address transmis-
sion, a data transmission and finally a STOP signal.
When a START signal is placed on the I
vices on the bus will receive this signal and be notified of
the imminent arrival of data on the bus. The first seven
bits of the data will be the slave address with the first bit
being the MSB. If the address of the microcontroller
matches that of the transmitted address, the HAAS bit in
the SIMC1 register will be set and an I
generated. After entering the interrupt service routine,
the microcontroller slave device must first check the
condition of the HAAS bit to determine whether the inter-
rupt source originates from an address match or from
the completion of an 8-bit data transfer. During a data
transfer, note that after the 7-bit slave address has been
transmitted, the following bit, which is the 8th bit, is the
read/write bit whose value will be placed in the SRW bit.
This bit will be checked by the microcontroller to deter-
mine whether to go into transmit or receive mode. Be-
fore any transfer of data to or from the I
microcontroller must initialise the bus, the following are
steps to achieve this:
Step 1
Write the slave address of the microcontroller to the I
bus address register SIMAR.
Step 2
Set the SIMEN bit in the SIMC0 register to 1 to enable
the I
Step 3
Set the EHI bit of the interrupt control register to enable
the I
Rev. 1.00
2
C Bus Communication
2
2
C bus.
C bus interrupt.
2
C bus requires four separate
2
C interrupt will be
2
C bus, all de-
2
C bus, the
2
C
30
Start Signal
The START signal can only be generated by the mas-
ter device connected to the I
microcontroller, which is only a slave device. This
START signal will be detected by all devices con-
nected to the I
that the I
be set. A START condition occurs when a high to low
transition on the SDA line takes place when the SCL
line remains high.
Slave Address
The transmission of a START signal by the master will
be detected by all devices on the I
mine which slave device the master wishes to com-
municate with, the address of the slave device will be
sent out immediately following the START signal. All
slave devices, after receiving this 7-bit address data,
will compare it with their own 7-bit slave address. If the
address sent out by the master matches the internal
address of the microcontroller slave device, then an
internal I
next bit following the address, which is the 8th bit, de-
fines the read/write status and will be saved to the
SRW bit of the SIMC1 register. The device will then
transmit an acknowledge bit, which is a low level, as
the 9th bit. The microcontroller slave device will also
set the status flag HAAS when the addresses match.
As an I
when the program enters the interrupt subroutine, the
HAAS bit should be examined to see whether the in-
terrupt source has come from a matching slave ad-
dress or from the completion of a data byte transfer.
When a slave address is matched, the device must be
placed in either the transmit mode and then write data
to the SIMDR register, or in the receive mode where it
must implement a dummy read from the SIMDR regis-
ter to release the SCL line.
2
C bus interrupt can come from two sources,
2
2
C bus interrupt signal will be generated. The
C bus is busy and therefore the HBB bit will
2
C bus. When detected, this indicates
2
C bus and not by the
2
C bus. To deter-
HT83FXX
May 12, 2009