HT83F10 HOLTEK [Holtek Semiconductor Inc], HT83F10 Datasheet - Page 33

• Manufacturer Part Number: HT83F10
• Description: Flash Type Voice OTP MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

Interrupts
Interrupts are an important part of any microcontroller
system. When an internal function such as a Time Base
or Timer requires microcontroller attention, their corre-
sponding interrupt will enforce a temporary suspension
of the main program allowing the microcontroller to di-
rect attention to their respective needs. Each device
contains a Time Base interrupt and two internal timer in-
terrupt functions. The Time Base interrupt is controlled
by bit 1 of INTC register, while the internal interrupt is
controlled by the Timer Counter overflow.
Interrupt Register
Overall interrupt control, which means interrupt enabling
and flag setting, is controlled using two registers, known
as INTC and INTCH, which are located in the Data
Memory. By controlling the appropriate enable bits in
these registers each individual interrupt can be enabled
or disabled. Also when an interrupt occurs, the corre-
sponding request flag will be set by the microcontroller.
The global enable flag if cleared to zero will disable all
interrupts.
Interrupt Operation
A timer or Time Base overflow or by setting their corre-
sponding request flag, if their appropriate interrupt en-
able bit is set. When this happens, the Program
Counter, which stores the address of the next instruction
to be executed, will be transferred onto the stack. The
Program Counter will then be loaded with a new ad-
dress which will be the value of the corresponding inter-
Rev. 1.00
Interrupt Control Register
33
rupt vector. The microcontroller will then fetch its next
instruction from this interrupt vector. The instruction at
this vector will usually be a JMP statement which will
take program execution to another section of program
which is known as the interrupt service routine. Here is
located the code to control the appropriate interrupt. The
interrupt service routine must be terminated with a RETI
statement, which retrieves the original Program Counter
address from the stack and allows the microcontroller to
continue with normal execution at the point where the in-
terrupt occurred.
The various interrupt enable bits, together with their as-
sociated request flags, are shown in the accompanying
diagram with their order of priority.
Once an interrupt subroutine is serviced, all the other in-
terrupts will be blocked, as the EMI bit will be cleared au-
tomatically. This will prevent any further interrupt nesting
from occurring. However, if other interrupt requests oc-
cur during this interval, although the interrupt will not be
immediately serviced, the request flag will still be re-
corded. If an interrupt requires immediate servicing
while the program is already in another interrupt service
routine, the EMI bit should be set after entering the rou-
tine, to allow interrupt nesting. If the stack is full, the in-
terrupt request will not be acknowledged, even if the
related interrupt is enabled, until the Stack Pointer is
decremented. If immediate service is desired, the stack
must be prevented from becoming full.
HT83FXX
May 12, 2009