ATA5771_09 ATMEL [ATMEL Corporation], ATA5771_09 Datasheet - Page 60

no-image

ATA5771_09

Manufacturer Part Number
ATA5771_09
Description
Microcontroller with UHF ASK/FSK Transmitter
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
5. CPU Core
5.1
5.2
7701C–AVR–12/08
Overview
Architectural Overview
This section discusses the AVR core architecture in general. The main function of the CPU core
is to ensure correct program execution. The CPU must therefore be able to access memories,
perform calculations, control peripherals, and handle interrupts.
Figure 5-1.
In order to maximize performance and parallelism, the AVR uses a Harvard architecture – with
separate memories and buses for program and data. Instructions in the Program memory are
executed with a single level pipelining. While one instruction is being executed, the next instruc-
tion is pre-fetched from the Program memory. This concept enables instructions to be executed
in every clock cycle. The Program memory is In-System Reprogrammable Flash memory.
Control Lines
Instruction
Instruction
Program
Memory
Block Diagram of the AVR Architecture
Register
Decoder
Flash
Program
Counter
and Control
EEPROM
Registrers
I/O Lines
Purpose
General
SRAM
Data Bus 8-bit
Status
32 x 8
Data
ALU
ATtiny24/44/84
Timer/Counter 0
Timer/Counter 1
Serial Interface
Comparator
Watchdog
Universal
Interrupt
Timer
Analog
Unit
7

Related parts for ATA5771_09