WM8580AGEFTRV WOLFSON [Wolfson Microelectronics plc], WM8580AGEFTRV Datasheet - Page 34
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WM8580AGEFTRV
Manufacturer Part Number
WM8580AGEFTRV
Description
Multichannel CODEC with S/PDIF Transceiver
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
1.WM8580AGEFTRV.pdf
(97 pages)
- Current page: 34 of 97
- Download datasheet (2Mb)
WM8580
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Table 23 Digital Volume Control Gain Levels
Setting the DACATC register bit causes the left channel attenuation settings to be applied to both left
and right channel DACs from the next audio input sample. No update to the attenuation registers is
required for DACATC to take effect.
Table 24 DAC Attenuation Register (DACATC)
The digital volume control also incorporates a zero cross detect circuit which detects a transition
through the zero point before updating the digital volume control with the new volume. This
mechanism helps prevents pops and clicks during volume transitions, and is enabled by control bit
DZCEN.
Table 25 Digital Zero Cross Register
REGISTER ADDRESS
REGISTER ADDRESS
DAC Control 5
DAC Control 5
L/RDAx[7:0]
FE(hex)
FF(hex)
00(hex)
01(hex)
R19
R19
13h
13h
:
:
:
BIT
BIT
6
5
DACATC
DZCEN
LABEL
LABEL
-∞ dB (mute)
GAIN LEVEL
-127.5dB
-0.5dB
0dB
:
:
:
DEFAULT
DEFAULT
0
0
Attenuator Control
0 = All DACs use attenuations as
programmed.
1 = Right channel DACs use
corresponding left DAC attenuations
DAC Digital Volume Zero Cross
Enable
0 = Zero Cross detect disabled
1 = Zero Cross detect enabled
DESCRIPTION
DESCRIPTION
PD Rev 4.3 August 2007
Production Data
34
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