WM8580AGEFTRV WOLFSON [Wolfson Microelectronics plc], WM8580AGEFTRV Datasheet - Page 69
![no-image](/images/no-image-200.jpg)
WM8580AGEFTRV
Manufacturer Part Number
WM8580AGEFTRV
Description
Multichannel CODEC with S/PDIF Transceiver
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
1.WM8580AGEFTRV.pdf
(97 pages)
- Current page: 69 of 97
- Download datasheet (2Mb)
Production Data
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Table 67 Powerdown Registers
REGISTER ADDRESS
PWRDN 2
PWRDN 1
R51
33h
R50
32h
BIT
4:2
1
6
0
4
5
0
1
2
3
DACPD[2:0]
ALLDACPD
SPDIFTXD
SPDIFRXD
SPDIFPD
PLLAPD
PLLBPD
ADCPD
OSCPD
LABEL
PWDN
DEFAULT
111
1
1
0
1
1
0
1
1
1
powerdown registers)
0 = All digital circuits running,
outputs are active
1 = All digital circuits in power
down mode, outputs muted
ADC powerdown
0 = ADC enabled
1 = ADC disabled
DAC powerdowns
0 = DAC enabled
1 = DAC disabled
DACPD[0] = DAC1
DACPD[1] = DAC2
DACPD[2] = DAC3
0 = DACs under control of
DACPD[3:0]
1= All DACs are disabled.
OSC output powerdown
0 = OSC output enabled
1 = OSC output disabled
A CMOS input can be applied to
the OSC input when powered
down.
0 = PLLA enabled
1 = PLLA disabled
0 = PLLB enabled
1 = PLLB disabled
S/PDIF Clock Recovery
PowerDown
0 = S/PDIF enabled
1 = S/PDIF disabled
S/PDIF Transmitter powerdown
0 = S/PDIF Transmitter enabled
1 = S/PDIF Transmitter disabled
S/PDIF Receiver powerdown
0 = S/PDIF Receiver enabled
1 = S/PDIF Receiver disabled
Master powerdown (overrides all
Overrides DACPD[3:0]
DESCRIPTION
PD Rev 4.3 August 2007
WM8580
69
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