WM8580AGEFTRV WOLFSON [Wolfson Microelectronics plc], WM8580AGEFTRV Datasheet - Page 47
WM8580AGEFTRV
Manufacturer Part Number
WM8580AGEFTRV
Description
Multichannel CODEC with S/PDIF Transceiver
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
1.WM8580AGEFTRV.pdf
(97 pages)
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Production Data
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MANUAL CLOCK SELECTION
It is possible to override all default clocking configuration restrictions by setting CLKSEL_MAN. When
CLKSEL_MAN is set, default clocking configurations such as automatic selection of PLLACLK for
DAC1 when DACSRC=00 (S/PDIF received data) are not applied. Instead, clock selection is
determined only by the relevant CLK_SEL register.
Table 37 SAIF Master Mode Clock Control
Table 38 Manual Clock Selection
REGISTER
REGISTER
ADDRESS
ADDRESS
CLKSEL
SAIF 1
R11
0Bh
08h
R8
Figure 31 SAIF Clock Selection
BIT
BIT
7:6
6
CLKSEL_MAN
SAIFMS_
CLKSEL
LABEL
LABEL
DEFAULT
DEFAULT
11
0
SAIF Master Mode clock source
Clock selection auto-configuration
override
00 = ADCMCLK pin
01 = PLLACLK
10 = PLLBCLK
11 = MCLK pin
0 = auto-configuration enabled,
clock configuration follows
restrictions described in page 42
to page 47.
1 = auto-configuration disabled,
clock configuration follows
relevant CLKSEL bits in R8 to
R11.
DESCRIPTION
DESCRIPTION
PD Rev 4.3 August 2007
WM8580
47
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