OX16PCI952-TQAG OXFORD [Oxford Semiconductor], OX16PCI952-TQAG Datasheet - Page 60

• Manufacturer Part Number: OX16PCI952-TQAG
• Description: Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
• Manufacturer: OXFORD [Oxford Semiconductor]

9.1.3
Zone2 of the EEPROM allows the end-user to override the
default settings of the Local Configuration Registers to
meet their specific applications. Accesses require one or
more configuration WORDs. Registers are selected using a
7-bit byte-offset field. This offset value is the offset from
Base Address Registers in I/O or memory space (see
section 6.4). Note: Not all of the registers in the Local
Configuration Register set are writable by the EEPROM.
(See
Registers”).
The format of configuration WORDs for the Local
Configuration Registers in Zone 2 are described in the
following table.
9.1.4
Zone 3 of the EEPROM allows the end-user to change the
Vendor and/or Subsystem Vendor ID’s of both logical
functions, to suit their requirements. Writes to this zone
affects the corresponding fields in the PCI Configuration
Space of both function 0 and function 1.
The format of Device Identification configuration WORDs
are described in Table 27.
DS-0028 Jul 05
14:8
Bits
7:0
Bits
OXFORD SEMICONDUCTOR LTD.
15
15
section
Description
‘0’ = There are no more Configuration WORDs
to follow in Zone2. Move to the next available
zone or end EEPROM program if no more zones
are enabled in the Header.
‘1’ = There is another Configuration WORD to
follow for the Local Configuration Registers.
These seven bits define the byte-offset of the
Local configuration register to be programmed.
For example the byte-offset for LCC[23:16] is
0x02.
8-bit value of the register to be programmed
Description
‘0’ = There are no more Zone 3 (Identification)
bytes to program. Move to the next available
zone or end EEPROM program if no more zones
are enabled in the Header.
to follow.
Zone2: Local Configuration Register Zone
Zone 3 : Identification Registers
‘1’ = There is another Zone 3 (Identification) byte
EEPROM Word Format for Zone 2
“Accessing
the
Local
Configuration
External-Free Release
9.1.5
Zone 4 of the EEPROM allows the end-user to alter the
default values/settings of the PCI Configuration Space
registers of both functions, independently. This excludes
writes to the Vendor ID and Subsystem Vendor ID fields
that can be written only through Zone 3).
This zone is divided into two groups, one for the PCI
Configuration Space of function 0 and one for function 1.
Each group consists of a function header WORD, and one
or more configuration WORDs for that function.
The function header is described in the following table.
The subsequent WORDs for each function contain the
address offset and a byte of programming data for the PCI
Configuration Space belonging to the function number
selected by the proceeding Function-Header. The format of
configuration WORDs for the PCI Configuration Registers
are described below.
14:8
Bits
14:3
Bits
14:8
7:0
2:0
7:0
15
15
0x00 = Vendor ID bits [7:0].
0x01 = Vendor ID bits [15:8].
0x02 = Subsystem Vendor ID [7:0].
0x03 = Subsystem Vendor ID [15:8].
0x03 to 0x7F = Reserved.
8-bit value of the register to be programmed
Description
‘0’ = End of Zone 4.
‘1’ = Define this function header.
Reserved. Write zeros.
Function number for the following configuration
WORD(s).
‘000’ = Function 0 (UARTs)
‘001’ = Function 1 (Parallel Port)
Other values = Reserved.
Description
‘0’ = This is the last configuration WORD in for
the selected function in the Function-Header.
‘1’ = There is another WORD to follow for this
function.
These seven bits define the byte-offset of the PCI
configuration register to be programmed. For
example the byte-offset of the Interrupt Pin
register is 0x3D. Offset values are tabulated in
section 6.2.
8-bit value of the register to be programmed
Zone 4 : PCI Configuration Registers
Table 28: Zone 4 data format (data)
Table 27: Zone 3 data format
OX16PCI952
Page 60