OX16PCI952-TQAG OXFORD [Oxford Semiconductor], OX16PCI952-TQAG Datasheet - Page 74

• Manufacturer Part Number: OX16PCI952-TQAG
• Description: Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
• Manufacturer: OXFORD [Oxford Semiconductor]

PCI CLK no (Parallel Port already placed in the reverse ECP transfer mode)
2
2-3
6
10-11
13
24
26
Tafd (PCI clk to AFD_N valid) : 16ns max*
Tack-afd : 3 clock cycles (see below) + Tafd
ECP Reverse Transfer Cycle duration is dependant upon the timing response of the peripheral’s ACK_N line and the parallel
port filters.Example waveform has the parallel port filters disabled. An extra 2 PCI CLK cycles will be incurred in the response of
the host to the peripheral’s ACK_N line when the filters are enabled.
DS-0028 Jul 05
OXFORD SEMICONDUCTOR LTD.
- Start of 1
- Peripheral asserts ACK_N low
- Host responds by asserting AFD_N (3 clock cycles after sampling ACK_N low)
- Peripheral deasserts ACK_N
- Host responds by de-asserting AFD_N (2 clock cycles after sampling ACK_N low)
- End of ECP reverse transfer (data already transferred to ECP DFIFO)
- Start of PCI read from ECP DFIFO (does not initiate or affect any ECP reverse transfers that may be taking place)
- Start of 2nd ECP reverse transfer by peripheral.
st
ECP reverse transfer by peripheral
External-Free Release
OX16PCI952
Page 74