ISPLSI1032-60LG/883 LATTICE [Lattice Semiconductor], ISPLSI1032-60LG/883 Datasheet - Page 9

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ISPLSI1032-60LG/883

Manufacturer Part Number
ISPLSI1032-60LG/883
Description
High-Density Programmable Logic
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet

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Power consumption in the ispLSI and pLSI 1032 device
depends on two primary factors: the speed at which the
device is operating, and the number of Product Terms
Figure 3. Typical Device Power Consumption vs fmax
I CC can be estimated for the ispLSI and pLSI 1032 using the following equation:
I CC = 52 + (# of PTs * 0.30) + (# of nets * Max. freq * 0.009) where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max. freq = Highest Clock Frequency to the device
The I CC estimate is based on typical conditions (V CC = 5.0V, room temperature) and an assumption of 2 GLB loads on
average exists. These values are for estimates only. Since the value of I CC is sensitive to operating conditions and the
program in the device, the actual I CC should be verified.
Maximum GRP Delay vs GLB Loads
Power Consumption
6
5
4
3
2
1
0
250
200
150
100
50
0
4
10
Notes: Configuration of eight 16-bit Counters
Specifications ispLSI and pLSI 1032
GLB Loads
20
Typical Current at 5V, 25˚C
8
30
f
ispLSI and pLSI 1032
max (MHz)
9
used. Figure 3 shows the relationship between power
and operating speed.
40
12
50
0126A-80-32-isp
60
16
70
ispLSI and pLSI 1032-60
ispLSI and pLSI 1032-80
ispLSI and pLSI 1032-90
80
1996 ISP Encyclopedia
0127A-32-80-isp

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