F25L32QA-100PAG ESMT [Elite Semiconductor Memory Technology Inc.], F25L32QA-100PAG Datasheet - Page 15

• Manufacturer Part Number: F25L32QA-100PAG
• Description: 3V Only 32 Mbit Serial Flash Memory with Dual and Quad
• Manufacturer: ESMT [Elite Semiconductor Memory Technology Inc.]

ESMT
Read (33MHz)
The Read instruction supports up to 33 MHz, it outputs the data
starting from the specified address location. The data output
stream is continuous through all addresses until terminated by a
low to high transition on CE . The internal address pointer will
automatically increment until the highest memory address is
reached. Once the highest memory address is reached, the
address pointer will automatically increment to the beginning
(wrap-around) of the address space, i.e. for 32Mbit density, once
Fast Read (50 MHz ~ 100 MHz)
The Fast Read instruction supporting up to 100 MHz is initiated
by executing an 8-bit command, 0BH, followed by address bits
[A
duration of the Fast Read cycle. See Figure 3 for the Fast Read
sequence.
Following a dummy byte (8 clocks input dummy cycle), the Fast
Read instruction outputs the data starting from the specified
address location. The data output stream is continuous through
Elite Semiconductor Memory Technology Inc.
Figure 2: Read Sequence
23
Figure 3: Fast Read Sequence
-A
SCK
SO
CE
0
SI
] and a dummy byte. CE must remain active low for the
MODE0
MODE3
Note : X = Dummy Byte : 8 Clocks Input Dummy (V
MSB
0 1 2 3 4 5 6 7 8
0B
HIGH IMPENANCE
MSB
ADD.
15 16
(Preliminary)
ADD.
IL
23 24
or V
IH
ADD.
)
31 32
the data from address location 3FFFFFH had been read, the next
output will be from address location 00000H.
The Read instruction is initiated by executing an 8-bit command,
03H, followed by address bits [A
low for the duration of the Read cycle. See Figure 2 for the Read
sequence.
all addresses until terminated by a low to high transition on CE .
The internal address pointer will automatically increment until the
highest memory address is reached. Once the highest memory
address is reached, the address pointer will automatically
increment to the beginning (wrap-around) of the address space,
i.e. for 32Mbit density, once the data from address location
3FFFFFH has been read, the next output will be from address
location 000000H.
X
MSB
39 40
D
N
OUT
47 48
N+1
D
OUT
55 56
Publication Date: Jan. 2009
Revision: 0.2
N+2
D
OUT
63 64
23
-A
D
N+3
0
OUT
]. CE must remain active
F25L32QA
71 72
D
N+4
OUT
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