24LC01B-MT MicrochipTechnology, 24LC01B-MT Datasheet - Page 3

• Manufacturer Part Number: 24LC01B-MT
• Description: 1K/2KI2CSerialEEPROMsinISOMicromodules
• Manufacturer: MicrochipTechnology

TABLE 1-2
FIGURE 1-1:
All parameters apply across the specified operat-
ing ranges unless otherwise noted.
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
SDA and SCL fall time
START condition hold time
START condition setup time
Data input hold time
Data input setup time
STOP condition setup time
Output valid from clock
Bus free time
Output fall time from V
minimum to V
Input filter spike suppression
(SDA and SCL pins)
Write cycle time
Endurance
Note 1: Not 100% tested. C
SCL
SDA
IN
SDA
OUT
1997 Microchip Technology Inc.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
3: The combined T
4: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific
Parameter
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
spike suppression. This eliminates the need for a TI specification for standard operation.
application, please consult the Total Endurance Model which can be obtained on our BBS or website.
IL
maximum
AC CHARACTERISTICS
BUS TIMING DATA
T
T
SP
SU
IH
:
STA
T
HD
SP
T
:
STA
F
B
and V
= total capacitance of one bus line in pF.
Symbol
T
T
T
T
T
T
T
HD
SU
HD
SU
SU
F
T
T
T
T
T
HIGH
LOW
T
T
CLK
T
BUF
WC
AA
OF
SP
HYS
:
:
:
:
LOW
R
:
F
STA
DAT
DAT
STO
STA
specifications are due to Schmitt trigger inputs which provide improved noise
Vcc = 2.5V - 5.5V
4000
4700
4000
4700
4000
4700
Min.
250
1M
STD MODE
—
—
—
—
—
—
—
0
T
T
HIGH
HD
:
DAT
Vcc = 2.5V to 5.5V
Commercial (C):
Max.
1000
3500
100
300
250
—
—
50
10
—
—
—
—
—
—
—
T
24LC01B/02B Modules
AA
Vcc = 4.5V - 5.5V
20 +0.1
1300
1300
Min.
FAST MODE
600
600
600
100
600
1M
C
—
—
—
—
—
—
0
B
T
SU
:
DAT
Max.
400
300
300
900
250
50
10
—
—
—
—
—
—
—
—
—
Tamb = 0 C to +70 C
cycles 25 C, V
Units
kHz
T
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SU
T
:
STO
R
clock pulse is generated
START condition
(Note 2)
before a new transmission
can start
(Note 1), C
Mode (Note 4)
(Note 1)
(Note 1)
After this period the first
Only relevant for repeated
(Note 2)
Time the bus must be free
(Notes 1, 3)
Byte or Page mode
CC
Remarks
T
B
= 5.0V, Block
BUF
DS21222A-page 3
100 pF