M30622 Mitsubishi, M30622 Datasheet - Page 125

• Manufacturer Part Number: M30622
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
• Manufacturer: Mitsubishi

Clock synchronous serial I/O mode
Figure 1.19.10. Typical transmit/receive timings in clock synchronous serial I/O mode
• Example of transmit timing (when internal clock is selected)
• Example of receive timing (when external clock is selected)
Tentative Specifications REV.A
S
pecifications in this manual are tentative and subject to change.
Transfer clock
Transmit enable
bit (TE)
Transmit buffer
empty flag (Tl)
CTSi
CLKi
TxDi
Transmit
register empty
flag (TXEPT)
Transmit interrupt
request bit (IR)
Receive enable
bit (RE)
Transmit enable
bit (TE)
Transmit buffer
empty flag (Tl)
RTSi
CLKi
RxDi
Receive complete
flag (Rl)
Receive interrupt
request bit (IR)
Shown in ( ) are bit symbols.
The above timing applies to the following settings:
• Internal clock is selected.
• CTS function is selected.
• CLK polarity select bit = “0”.
• Transmit interrupt cause select bit = “0”
Shown in ( ) are bit symbols.
The above timing applies to the following settings:
f
EXT
• External clock is selected.
• RTS function is selected.
• CLK polarity select bit = “0”.
: frequency of external clock
“H”
“1”
“0”
“1”
“0”
“L”
“1”
“0”
“1”
“0”
“H”
“L”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
Transferred from UARTi receive register
Data is set in UARTi transmit buffer register
to UARTi receive buffer register
Cleared to “0” when interrupt request is accepted, or cleared by software
D
D
0
Transferred from UARTi transmit buffer register to UARTi transmit register
Dummy data is set in UARTi transmit buffer register
0
D
D
1
1
T
D
D
CLK
2
2
D
D
3
Transferred from UARTi transmit buffer register to UARTi transmit register
3
D
D
4
Tc
4
1 / f
Receive data is taken in
D
D
5
Cleared to “0” when interrupt request is accepted, or cleared by software
5
125
EXT
D
D
6
6
D
D
7
7
Stopped pulsing because CTS = “H”
Read out from UARTi receive buffer register
D
0
D
Tc = TCLK = 2(n + 1) / fi
0
D
1
D
fi: frequency of BRGi count source (f
n: value set to BRGi
1
Meet the following conditions are met when the CLK
input before data reception = “H”
D
• Transmit enable bit
• Receive enable bit
• Dummy data write to UARTi transmit buffer register
D
2
2
D
3
D
3
D
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
D
4
4
D
5
D
5
D
6
D
7
“1”
“1”
Stopped pulsing because transfer enable bit = “0”
Mitsubishi microcomputers
D
0
1
D
, f
M16C / 62T Group
1
8
, f
D
32
2
)
D
3
D
4
D
5
D
6
D
7