P82C150AFT Philips Semiconductors, P82C150AFT Datasheet - Page 17

• Manufacturer Part Number: P82C150AFT
• Description: CAN Serial Linked I/O device SLIO with digital and analog port functions
• Manufacturer: Philips Semiconductors

Philips Semiconductors
7.3.4
The P82C150 can pass through four CAN-bus modes
under certain conditions (see Fig.8). In the bus modes
0 to 2 (see Table 10) the P82C150 is operating with
different input comparator configurations. Bus mode 3 is
the power reduced Sleep Mode.
The bus modes support:
There are two possibilities for condition 1 to switch to the
next mode (see Fig.8):
When the bus mode changes, all I/O Registers are cleared
and outputs become floating (OE bits cleared). That
means the I/O ports return to a fail-safe state whenever the
P82C150 looses connection to its host controller. This is a
kind of network watchdog function. The status bits are set
to the following values after a bus mode change:
The programmed Identifier bits remain unchanged.
Table 10 Can-bus modes
Note
1. Output TX1 is disabled in bus mode 2 to tolerate short-circuit between the CAN-bus wires CAN_H and CAN_L.
1996 Jun 19
0 = Differential
1 = One-wire RX1
2 = One-wire RX0
3 = Sleep
Communication on two balanced wires (differential
system)
Communication on one wire in a two-wire differential
system
Sleep Mode with wake-up via either a dominant signal
on RX0 or RX1 input
Connection of a second transmission medium
(redundancy)
Overflow of the bit counter when 8192 is reached since
the last calibration message
Overflow of the Transmit Error Counter (>255; bus-off
limit reached).
RSTD = 1
EW = 0
BM
CAN Serial Linked I/O device (SLIO) with
digital and analog port functions
BUS MODE
new
CAN-
= BM
BUS MODES
old
+ 1.
BM1
0
0
1
1
BITS
BM0
0
1
0
1
RX0 > RX1
RX1 < REF
RX0 > REF
RX0 > REF
and
RX1 < REF
RECESSIVE
RECEPTION LEVEL
17
columns
After reset the P82C150 changes directly into bus mode 3
(Sleep Mode). During Sleep Mode, the internal RC
oscillator is stopped, and all the output drivers are disabled
(I/O Register contents cleared). A P82C150 in Sleep Mode
can be woken up via CAN-bus lines (dominant level on
RX0 or RX1) or by a reset condition.
RESET
end of
Condition 1:
bit counter overflow (>8191) or Transmit Error Counter overflow (>255).
Condition 2:
dominant bit detected on RX0 and RX1.
Fig.8 CAN-bus modes and switch-over conditions.
RX0 < RX1
RX1 > REF
RX0 < REF
RX0 < REF
or
RX1 > REF
DOMINANT
Inputs: RX0, RX1
Outputs: no
Condition 1
SLEEP
MODE
Condition 2
'3'
enabled
enabled
disabled
disabled
Inputs: RX0, RX1
Outputs: TX0, TX1
DIFFERENTIAL
Input: RX0
Output: TX0
ONE-WIRE
RX0 MODE
TX1
MODE
TRANSMISSION
'0'
'2'
Preliminary specification
Outputs: TX0, TX1
enabled
enabled
disabled
enabled
Condition 1
Condition 1
P82C150
Input: RX1
ONE-WIRE
RX1 MODE
'1'
MHA070
TX0