P82C150AFT Philips Semiconductors, P82C150AFT Datasheet - Page 19

• Manufacturer Part Number: P82C150AFT
• Description: CAN Serial Linked I/O device SLIO with digital and analog port functions
• Manufacturer: Philips Semiconductors

Philips Semiconductors
7.3.7
The transmit and receive logic stores the destuffed bit
stream which was received or is about to be transmitted.
The incoming Identifier is compared with that of the
P82C150. The content of the message is transferred to the
port logic in case of matching.
At transmission, the message about to be sent is put
together: the Identifier, the status information, the register
address and the content of the addressed register from the
port logic.
7.3.8
The Bit Stream Processor (BSP) is a sequencer to control
the data stream between the transmit/receive logic
(parallel data) and the on-chip CAN transceiver (serial
data). Reception/transmission, bit stuffing/destuffing,
arbitration and error detection, according to CAN protocol
specification version 2.0 A and B (passive), are performed.
Further, automatic re-transmission of corrupted messages
is handled by means of continuously comparing the output
bit stream with the input bit stream. Moreover, the Bit
Stream Processor provides control information to calibrate
the internal bit time.
The Error Management Logic is responsible for the
complete CAN-inherent error management.
7.3.9
The P82C150 contains an on-chip RC-oscillator. The bit
time is automatically calibrated by messages being
received via CAN-bus. During start-up (after wake-up or
reset) any message is used to calibrate the bit time until
the calibration is sufficient to receive messages correctly.
Table 13 Example of a suitable calibration message
The two important 1/0 transitions are marked by underlines; see note 1.
Note
1. I = stuff bit (recessive); the total length is 67 bit from start-of-frame to end-of-intermission.
1996 Jun 19
SOF
CAN Serial Linked I/O device (SLIO) with
digital and analog port functions
0
T
B
M
O
ARBITRATION FIELD
RANSMIT AND RECEIVE LOGIC
IT
SCILLATOR AND CALIBRATION
ANAGEMENT
000 1010 1010 0
S
TREAM
P
ROCESSOR AND
L
OGIC
E
CONTROL
RROR
000I010
FIELD
DATA BYTE 1
19
1010 1010
From this time on, the bit time is calibrated and fine-tuned
by calibration messages with a special Identifier
transmitted by the crystal-controlled host.
Only P82C150 nodes being calibrated by calibration
messages can transmit messages. The first message is
transmitted directly after entering the calibrated state
(‘sign-on’ message). Since the P82C150 is not able to
transmit as long as the bit time is not calibrated, it cannot
wake-up other CAN nodes via the bus line. Hence to keep
the network alive, the calibration message must be
transmitted regularly by a crystal-controlled (host) node
with a maximum repetition period of 8192 bit (bit length
measured by the 82C150). It is recommended to select a
repetition period between 3800 and maximum 8000 bit
times.
7.3.10
The calibration message has to meet the following
requirements
Example of a suitable calibration message (there are
others using different data bytes; see Table 13):
Transmitted by a crystal-controlled node (host node)
Identifier: 000 1010 1010 (1 = recessive; 0 = dominant)
RTR bit: 0
Allowed control field: DLC = 2 to 8
The first recessive to dominant transition after the
control field must be followed by another recessive to
dominant transition in a distance of exactly 32 bit (stuff
bits included).
Data length code: 0010
1st data byte: 1010 1010 (AAH)
2nd data byte: 0000 0100 (04H).
C
ALIBRATION MESSAGE
DATA BYTE 2
0000I 0100
Preliminary specification
000I0 1011 1000 00I0
CRC FIELD
P82C150