GS74104J-15 GSI [GSI Technology], GS74104J-15 Datasheet - Page 7

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GS74104J-15

Manufacturer Part Number
GS74104J-15
Description
1M x 4 4Mb Asynchronous SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
Read Cycle 2: WE = V
Write Cycle
* These parameters are sampled and are not 100% tested.
Rev: 1.07 1/2001
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Output Low Z from end of write
Address valid to end of write
Chip enable to end of write
Write recovery time (WE)
Write recovery time (CE)
Write to output in High Z
Address set up time
Write pulse width
Data set up time
Write cycle time
Data hold time
Parameter
IH
Address
CE
OE
Data Out
High impedance
Symbol
tWHZ
tWLZ
tWR1
tWC
tAW
tCW
tDW
tWP
tWR
tDH
tAS
*
*
7/12
t
LZ
t
OLZ
t
Min
AA
5.5
5.5
5.5
8
4
0
0
0
0
3
t
AC
-8
Max
t
t
RC
OE
3.5
Min
10
7
7
5
0
7
0
0
0
3
-10
D
ATA VALID
Max
4
t
t
OHZ
HZ
Min
12
8
8
6
0
8
0
0
0
3
-12
© 1999, Giga Semiconductor, Inc.
Max
5
Min
15
10
10
10
7
0
0
0
0
3
GS74104TP/J
-15
Max
6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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