EVAL-ADAU1701EB AD [Analog Devices], EVAL-ADAU1701EB Datasheet - Page 29

• Manufacturer Part Number: EVAL-ADAU1701EB
• Description: SigmaDSP 28/56-Bit Audio Processor with 2ADC/4DAC
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
microcontroller chips. In order to fit into a byte-oriented
format, 0s are appended to the data fields before the MSB in
order to extend the data word to the next multiple of eight bits.
For example, 28-bit words written to the parameter RAM are
appended with four leading 0s in order to reach 32 bits
(4 bytes); 40-bit words written to the program RAM are not
appended with any 0s because it is already a full 5 bytes. These
zero-extended data fields are appended to a 3-byte field
consisting of a 7-bit chip address, a read/write bit, and an 11-bit
RAM/register address. The control port knows how many data
bytes to expect based on the address that is received in the first
three bytes.
Table 27. Parameter RAM Read/Write Format (Single Address)
Byte 0
chip_adr [6:0], W/R
Table 28. Parameter RAM Block Read/Write Format (Burst Mode)
Byte 0
chip_adr [6:0], W/R
Table 29. Program RAM Read/Write Format (Single Address)
Byte 0
chip_adr [6:0], W/R
Table 30. Program RAM Block Read/Write Format (Burst Mode)
Byte 0
chip_adr [6:0], W/R
Table 31. Control Register Read/Write Format (Core, Serial Out 0, Serial Out 1)
Byte 0
chip_adr [6:0], W/R
Table 32. Control Register Read/Write Format (RAM Configuration, Serial Input)
Byte 0
chip_adr [6:0], W/R
Table 33. Data Capture Register Write Format
Byte 0
chip_adr [6:0], W/R
1
ProgCount[10:0] = value of program counter where trap occurs (the table of values is generated by the program compiler).
Byte 1
0000, data_capture_adr[11:8]
Byte 1
0000, prog_adr[11:8]
Byte 1
00000,
param_adr[10:8]
Byte 1
00000, param_adr[10:8]
Byte 1
0000, prog_adr[11:8]
Byte1
0000, reg_adr[11:8]
Byte1
0000, reg_adr[11:8]
Byte 2
prog_adr[7:0]
Byte 2
param_adr[7:0]
Byte 2
data_capture_adr[7:0]
Rev. PrF | Page 29 of 43
Byte 2
param_adr[7:0]
Byte 2
prog_adr[7:0]
Byte 3
0000, param[27:24]
Byte 3-7
prog[39:0]
The total number of bytes for a single-location write command
can vary from four bytes (for a control register write), to eight
bytes (for a program RAM write). Burst mode may be used to
fill contiguous register or RAM locations. A burst mode write is
done by writing the address and data of the first RAM/register
location to be written. Rather than ending the control port
transaction (by issuing a stop command in I
bringing the CLATCH signal high in SPI mode, after the data
word), as would be done in a single-address write, the next data
word can be written immediately without first writing its
specific address. The ADAU1701 control port auto-increments
the address of each write, even across the boundaries of the
different RAMs and registers. Table 28 and Table 30 show
examples of burst mode writes.
<—param_adr—>
<—prog_adr—>
Byte 2
reg_adr[7:0]
Byte 2
reg_adr[7:0]
Byte 3
000, progCount[10:6]
Bytes 4–6
param[23:0]
Byte 3
0000, param[27:24]
Bytes 3–7
prog[39:0]
Byte 3
data[15:8]
Byte 7
Byte 8
Byte 9
Byte 10
param_adr + 1
Byte 8
Byte 9
Byte 10
Byte 11
Byte 12
prog_adr +1
1
Byte 4
progCount[5:0]
2
C mode or by
Bytes 4–6
param [23:0]
ADAU1701
Byte 4
data[7:0]
Byte 11
Byte 12
Byte 13
Byte 14
param_adr + 2
Byte 13
Byte 14
Byte 15
Byte 16
Byte 17
prog_adr +2
Byte 3
data[7:0]
1
, regSel[1:0]
2