AM29LV160BB-120SF AMD [Advanced Micro Devices], AM29LV160BB-120SF Datasheet
AM29LV160BB-120SF
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AM29LV160BB-120SF Summary of contents
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Am29LV160B Data Sheet This product has been retired and is not recommended for designs. For new and current designs, supersedes S29AL016D Am29LV160B the datasheet for specifications and ordering information. Availability of this document is S29AL016D retained for reference and historical ...
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Am29LV160B 16 Megabit ( 8-Bit 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory This product has been retired and is not recommended for designs. For new and current designs, S29AL016D supersedes Am29LV160B and is the factory-recommended ...
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GENERAL DESCRIPTION The Am29LV160B Mbit, 3.0 Volt-only Flash memory organized as 2,097,152 bytes or 1,048,576 words. The de- vice is offered in 48-ball FBGA, 44-pin SO, and 48-pin TSOP packages. The word-wide data (x16) appears on DQ15–DQ0; ...
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... Standby Mode ........................................................................ 11 Automatic Sleep Mode ........................................................... 11 RESET#: Hardware Reset Pin ............................................... 12 Output Disable Mode .............................................................. 12 Table 2. Sector Address Tables (Am29LV160BT).......................... 13 Table 3. Sector Address Tables (Am29LV160BB).......................... 14 Autoselect Mode ..................................................................... 15 Table 4. Am29LV160B Autoselect Codes (High Voltage Method).. 15 Sector Protection/Unprotection ............................................... 15 Temporary Sector Unprotect .................................................. 16 Figure 1. Temporary Sector Unprotect Operation........................... 16 In-System Sector Protect/Unprotect Algorithms 17 Common Flash Memory Interface (CFI) ...
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Revision H+2 (June 11, 2004) ................................................ 53 Revision H+3 (September 17, 2004) ...................................... 53 4 Am29LV160B ...
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PRODUCT SELECTOR GUIDE Family Part Number Regulated Voltage Range: V Speed Option Full Voltage Range: V Max access time ACC Max CE# access time Max OE# access time Note: ...
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CONNECTION DIAGRAMS A15 1 2 A14 A13 3 4 A12 A11 5 A10 A19 WE# 11 RESET RY/BY A18 A17 ...
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CONNECTION DIAGRAMS RESET# 1 A18 2 A17 CE OE# 14 DQ0 15 DQ8 16 DQ1 17 DQ9 18 DQ2 ...
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PIN CONFIGURATION A0–A19 =20 addresses DQ0–DQ14 =15 data inputs/outputs DQ15/A-1 =DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) BYTE# =Selects 8-bit or 16-bit mode CE# =Chip enable OE# = Output enable WE# =Write enable RESET# =Hardware reset ...
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... SPEED OPTION See Product Selector Guide and Valid Combinations BOOT CODE SECTOR ARCHITECTURE T = Top Sector B = Bottom Sector Valid Combinations for FBGA Packages Order Number ED, SD AM29LV160BT-70R, AM29LV160BB-70R AM29LV160BT-80, AM29LV160BB-80 AM29LV160BT-90, AM29LV160BB-90 AM29LV160BT-120, AM29LV160BB-120 Am29LV160B ° C) ° C) with Pb-free package ° C) ° ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is composed of ...
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WE# and CE and OE For program operations, the BYTE# pin determines whether the device accepts program data in bytes or words. Refer to “Word/Byte ...
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RESET#: Hardware Reset Pin The RESET# pin provides a hardware method of re- setting the device to reading array data. When the system drives the RESET# pin to V riod the device immediately terminates any RP operation ...
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Table 2. Sector Address Tables (Am29LV160BT) Sector A19 A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 0 0 ...
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... Table 3. Sector Address Tables (Am29LV160BB) Sector A19 A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 ...
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Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equip ...
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Temporary Sector Unprotect This feature allows temporary unprotection of previ- ously protected sectors to change data in-system. The Sector Unprotect mode is activated by setting the RE- SET# pin During this mode, formerly protected ID sectors can ...
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START PLSCNT = 1 RESET Wait 1 μs No First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with ...
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COMMON FLASH MEMORY INTERFACE (CFI) The Common Flash Interface (CFI) specification out- lines device and host system software interrogation handshake, which allows specific vendor-specified software algorithms to be used for entire families of devices. Software support can then be device-inde- ...
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Addresses Addresses (Word Mode) (Byte Mode) 1Bh 36h 1Ch 38h 1Dh 3Ah 1Eh 3Ch 1Fh 3Eh 20h 40h 21h 42h 22h 44h 23h 46h 24h 48h 25h 4Ah 26h 4Ch Addresses Addresses (Word Mode) (Byte Mode) 27h 4Eh 28h 50h ...
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Table 8. Primary Vendor-Specific Extended Query Addresses Addresses (Word Mode) (Byte Mode) 40h 80h 41h 82h 42h 84h 43h 86h 44h 88h 45h 8Ah 46h 8Ch 47h 8Eh 48h 90h 49h 92h 4Ah 94h 4Bh 96h 4Ch 98h Hardware Data ...
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COMMAND DEFINITIONS Writing specific address and data commands or se- quences into the command register initiates device operations. Table 9 defines the valid register command sequences. Writing incorrect address and data val- ues or writing them in the improper sequence ...
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DQ7, DQ6, or RY/BY#. See “Write Operation Status” for information on these status bits. Any commands written to the device during the Em- bedded Program Algorithm are ignored. Note that a hardware reset immediately terminates the program ...
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Figure 4 illustrates the algorithm for the erase opera- tion. See the Erase/Program Operations tables in “AC Characteristics” for parameters, and to Figure 18 for timing ...
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When the device exits the autoselect mode, the device reverts to the Erase Suspend mode, and is ready for another valid operation. See “Autoselect Command Sequence” for more information. The system must ...
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Table 9. Am29LV160B Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte Word Sector ...
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WRITE OPERATION STATUS The device provides several bits to determine the sta- tus of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 10 and the following subsections describe the functions of these bits. DQ7, RY/BY#, and DQ6 ...
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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...
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still toggling, the de- vice did not complete the operation successfully, and the system must write the reset command to return to reading array data. The ...
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DQ5: Exceeded Timing Limits DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit. Under these conditions DQ5 produces a “1.” This is a failure condition that indicates the program or erase cycle was ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...
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DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Notes Active Write Current CC I CC2 (Notes ...
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DC CHARACTERISTICS (Continued) Zero Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...
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TEST CONDITIONS Device Under Test C L 6.2 kΩ Note: Diodes are IN3064 or equivalent Figure 11. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V Input 1.5 V 0.0 V Figure 12. Input Waveforms ...
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AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...
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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded Algorithms) t READY to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...
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AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std Description t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...
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AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY# t VCS V CC Notes program address program data Illustration shows device in word ...
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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE# t GHWL OE# WE Data RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid Address for reading ...
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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...
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AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use CE# or OE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector. Figure 21. ...
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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# Note: For sector protect For sector unprotect ...
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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes program address program data, DQ7# = complement of the data written ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 3) Word Mode Notes: 1. Typical program and erase times assume the following conditions: 25 programming typicals ...
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PHYSICAL DIMENSIONS* TS 048—48-Pin Standard TSOP (measured in millimeters) 46 Am29LV160B Dwg rev AA; 10/99 ...
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For reference only. BSC is an ANSI standard for Basic Space Centering. Am29LV160B 47 ...
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PHYSICAL DIMENSIONS TSR048—48-Pin Reverse TSOP (measured in millimeters) * For reference only. BSC is an ANSI standard for Basic Space Centering. 48 Am29LV160B Dwg rev AA; 10/99 ...
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PHYSICAL DIMENSIONS FBC048—48-Ball Fine-Pitch Ball Grid Array (FBGA (measured in millimeters) Am29LV160B Dwg rev AF; 10/99 49 ...
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PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package (measured in millimeters) 50 Am29LV160B Dwg rev AC; 10/99 ...
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REVISION SUMMARY Revision F (January 1998) Distinctive Characteristics Changed typical read and program/erase current specifications. Device now has a guaranteed minimum endurance of 1,000,000 write cycles. Figure 2, In-System Sector Protect/Unprotect Algorithms Corrected Changed wait specification to ...
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Deleted t and changed OE# waveform to start at GHWL high. Physical Dimensions Replaced figures with more detailed illustrations. Revision H+1 (February 22, 2000) Global Added dash to speed options. Ordering Information Added dash to OPNs. Colophon The products described ...