AM29LV256MH110PGF AMD [Advanced Micro Devices], AM29LV256MH110PGF Datasheet - Page 11

• Manufacturer Part Number: AM29LV256MH110PGF
• Description: 256 Megabit (16 M x 16-Bit/32 M x 8-Bit) MirrorBitTM 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/OTM Control
• Manufacturer: AMD [Advanced Micro Devices]

DEVICE BUS OPERATIONS
This section describes the requirements and use of
the device bus operations, which are initiated through
the internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is a latch used to store the com-
mands, along with the address and data information
needed to execute the command. The contents of the
Legend: L = Logic Low = V
A
Notes:
1. Addresses are A23:A0 in word mode; A23:A-1 in byte mode. Sector addresses are A23:A15 in both modes.
2. The sector group protect and sector unprotect functions may also be implemented via programming equipment. See the
3. If WP# = V
4. D
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O
pins operate in the byte or word configuration. If the
BYTE# pin is set at logic ‘1’, the device is in word con-
figuration, DQ0–DQ15 are active and controlled by
CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is in byte
configuration, and only data I/O pins DQ0–DQ7 are
active and controlled by CE# and OE#. The data I/O
December 16, 2005
Read
Write (Program/Erase)
Accelerated Program
Standby
Output Disable
Reset
Sector Group Protect
(Note 2)
Sector Group Unprotect
(Note 2)
Temporary Sector Group
Unprotect
IN
Group Protection and Unprotection”
determined by the method described in “Write Protect (WP#)”. All sectors are unprotected when shipped from the factory (The
SecSi Sector may be factory protected depending on version ordered.)
= Address In, D
IN
Operation
or D
OUT
IL
, the first or last sector group remains protected. If WP# = V
as required by command sequence, data polling, or sector protect algorithm (see Figure 2).
IN
= Data In, D
V
0.3 V
CE#
CC
IL
X
X
L
L
L
L
L
L
, H = Logic High = V
±
OUT
OE#
H
H
H
H
H
X
X
X
L
= Data Out
section.
WE# RESET#
H
H
L
L
X
X
L
L
X
Table 1. Device Bus Operations
IH
V
0.3 V
D A T A S H E E T
, V
CC
V
V
V
H
H
H
H
L
ID
ID
ID
ID
±
= 11.5–12.5 V, V
Am29LV256M
(Note 3)
(Note 3)
WP#
X
X
X
X
H
H
H
register serve as inputs to the internal state machine.
The state machine outputs dictate the function of the
device.
puts and control levels they require, and the resulting
output. The following subsections describe each of
these operations in further detail.
pins DQ8–DQ14 are tri-stated, and the DQ15 pin is
used as an input for the LSB (A-1) address function.
VersatileIO
The VersatileIO
to set the voltage levels that the device generates and
tolerates on CE# and DQ I/Os to the same voltage
level that is asserted on V
for V
ACC
V
X
X
H
X
X
X
X
X
IH
HH
HH
IO
, the first or last sector will be protected or unprotected as
options on this device.
= 11.5–12.5V, X = Don’t Care, SA = Sector Address,
Table 1
A3=L, A2=L,
A3=L, A2=L,
A1=H, A0=L
A1=H, A0=L
Addresses
SA, A6 =L,
SA, A6=H,
(Note 2)
TM
A
A
A
A
X
X
X
IN
IN
IN
IN
TM
lists the device bus operations, the in-
(V
(V
IO
IO
) Control
) control allows the host system
(Note 4) (Note 4)
(Note 4) (Note 4)
(Note 4)
(Note 4)
(Note 4) (Note 4)
High-Z
High-Z
High-Z
DQ0–
D
DQ7
IO
OUT
. See
BYTE#
High-Z
High-Z
High-Z
Ordering Information
= V
D
OUT
X
X
IH
DQ8–DQ15
DQ15 = A-1
DQ8–DQ14
= High-Z,
BYTE#
High-Z
High-Z
High-Z
High-Z
= V
“Sector
X
X
IL
9