IDT74ALVCH162373PAG IDT, Integrated Device Technology Inc, IDT74ALVCH162373PAG Datasheet - Page 2

IC LATCH 16BIT TRANSP D 48-TSSOP

IDT74ALVCH162373PAG

Manufacturer Part Number
IDT74ALVCH162373PAG
Description
IC LATCH 16BIT TRANSP D 48-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
74ALVCHr
Type
D-Typer
Datasheet

Specifications of IDT74ALVCH162373PAG

Output Type
Tri-State
Logic Type
D-Type Transparent Latch
Circuit
8:8
Voltage - Supply
2.3 V ~ 3.6 V
Independent Circuits
2
Delay Time - Propagation
1.5ns
Current - Output High, Low
12mA, 12mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Logic Family
ALVC
Number Of Bits
16
Number Of Elements
2
Latch Mode
Transparent
Polarity
Non-Inverting
Technology
CMOS
Package Type
TSSOP
Propagation Delay Time
6.5ns
Operating Supply Voltage (typ)
3.3V
High Level Output Current
-12mA
Low Level Output Current
12mA
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74ALVCH162373PAG
800-1552
800-1552-5
800-1552

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT74ALVCH162373PAG
Manufacturer:
PHILIPS
Quantity:
445
PIN CONFIGURATION
IDT74ALVCH162373
3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
GND
GND
GND
GND
1
2
2
2
2
V
1
1
V
2
1
1
1
1
2
2
2
1
2
1
OE
Q
OE
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
CC
Q
Q
CC
4
6
8
2
3
4
6
7
1
3
5
7
5
8
2
1
10
15
16
11
12
13
14
17
18
19
22
23
24
1
20
21
2
3
4
5
6
7
8
9
SSOP/ TSSOP
TOP VIEW
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
30
29
28
27
25
31
26
1
1
1
1
1
1
1
1
GND
V
1
GND
2
2
GND
2
2
2
2
V
2
2
GND
2
D
D
LE
D
D
D
D
D
D
D
D
D
D
D
LE
D
D
D
CC
CC
4
8
1
2
3
5
6
7
1
2
3
4
6
8
5
7
2
CAPACITANCE
NOTE:
1. As applicable to the device type.
PIN DESCRIPTION
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
FUNCTION TABLE
NOTES:
1. H = HIGH Voltage Level
2. Output level before the indicated steady-state input conditions were established.
ABSOLUTE MAXIMUM RATINGS
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
2. V
3. All terminals except V
Symbol
V
V
T
I
I
I
I
I
C
Symbol
C
C
CC
OUT
IK
OK
SS
STG
TERM
TERM
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
IN
OUT
I/O
CC
Pin Names
xOE
terminals.
(2)
(3)
xOE
xDx
x Q x
H
xLE
L
L
L
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
Continuous Clamp Current, V
Continuous Current through each
V
Input Capacitance
Output Capacitance
I/O Port Capacitance
I
CC
< 0 or V
Parameter
or GND
Description
Data Inputs
Latch Enable Inputs
3-State Outputs
3-State Output Enable Input (Active LOW)
I
CC
> V
Inputs
Description
.
xLE
H
H
X
L
CC
(1)
(T
(1)
A
INDUSTRIAL TEMPERATURE RANGE
= +25°C, F = 1.0MHz)
Conditions
V
V
V
(EACH 8-BIT SECTION)
OUT
IN
IN
O
= 0V
< 0
= 0V
= 0V
xDx
H
L
X
X
–0.5 to V
Typ.
–0.5 to +4.6
–65 to +150
–50 to +50
5
7
7
±100
Max
±50
–50
CC
Max.
Outputs
+0.5
7
9
9
(1)
Q
xQx
(1)
H
L
Z
o
(2)
Unit
Unit
pF
pF
pF
mA
mA
mA
mA
° C
V
V

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