74VHCT573AMTC Fairchild Semiconductor, 74VHCT573AMTC Datasheet - Page 2

IC LATCH OCTAL D 3STATE 20TSSOP

74VHCT573AMTC

Manufacturer Part Number
74VHCT573AMTC
Description
IC LATCH OCTAL D 3STATE 20TSSOP
Manufacturer
Fairchild Semiconductor
Series
74VHCTr
Datasheet

Specifications of 74VHCT573AMTC

Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
5.1ns
Current - Output High, Low
8mA, 8mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
©1997 Fairchild Semiconductor Corporation
74VHCT573A Rev. 1.3
Logic Symbol
Truth Table
H
L
X
Z
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
LOW Voltage Level
High Impedance
Immaterial
HIGH Voltage Level
OE
H
L
L
L
Inputs
LE
H
H
X
L
IEEE/IEC
D
H
X
X
L
Outputs
O
O
H
Z
L
n
0
2
Functional Description
The VHCT573A contains eight D-type latches with
3-STATE output buffers. When the Latch Enable (LE)
input is HIGH, data on the D
In this condition the latches are transparent, i.e., a latch
output will change state each time its D input changes.
When LE is LOW the latches store the information that
was present on the D inputs, a setup time preceding the
HIGH-to-LOW transition of LE. The 3-STATE buffers are
controlled by the Output Enable (OE) input. When OE is
LOW, the buffers are enabled. When OE is HIGH the
buffers are in the high impedance mode, but, this does
not interfere with entering new data into the latches.
n
inputs enters the latches.
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