74AHCT373PW,118 NXP Semiconductors, 74AHCT373PW,118 Datasheet
74AHCT373PW,118
Specifications of 74AHCT373PW,118
74AHCT373PW-T
935262650118
Related parts for 74AHCT373PW,118
74AHCT373PW,118 Summary of contents
Page 1
Octal D-type transparant latch; 3-state Rev. 03 — 20 May 2008 1. General description The 74AHC373; 74AHCT373 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL specified in compliance with ...
Page 2
... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74AHC373 74AHC373D +125 C 74AHC373PW +125 C 74AHCT373 74AHCT373D +125 C 74AHCT373PW +125 C 4. Functional diagram Fig 1. Functional diagram 74AHC_AHCT373_3 Product data sheet 74AHC373; 74AHCT373 Name Description SO20 plastic small outline package; 20 leads; ...
Page 3
... NXP Semiconductors Fig 2. Logic symbol LATCH LATCH Fig 4. Logic diagram Fig 5. Logic diagram (one latch) 74AHC_AHCT373_3 Product data sheet 001aae048 Fig LATCH LATCH Rev. 03 — 20 May 2008 74AHC373; 74AHCT373 Octal D-type transparant latch; 3-state 001aae049 IEC logic symbol LATCH LATCH LATCH ...
Page 4
... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 6. Pin configuration SO20 and TSSOP20 5.2 Pin description Table 2. Pin description Symbol Pin GND 74AHC_AHCT373_3 Product data sheet 74AHC373; 74AHCT373 74AHC373 74AHCT373 GND 10 11 001aai132 Description 3-state output enable input (active LOW) 3-state latch output ...
Page 5
... NXP Semiconductors Table 2. Pin description …continued Symbol Pin Functional description [1] Table 3. Function table Operating mode Enable and read register (transparent mode) Latch and read register Latch register and disable outputs [ HIGH voltage level HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition; ...
Page 6
... NXP Semiconductors 8. Recommended operating conditions Table 5. Operating conditions Symbol Parameter 74AHC373 V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 74AHCT373 V supply voltage CC V input voltage I V output voltage O T ambient temperature ...
Page 7
... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I OFF-state output current 5 input leakage current 5 supply current 5 input capacitance C output O capacitance 74AHCT373 V HIGH-level input voltage V LOW-level input voltage V HIGH-level output voltage ...
Page 8
... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions 74AHC373 t propagation Dn to Qn; see pd delay Qn; see enable time OE to Qn; see disable time OE to Qn; see ...
Page 9
... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t hold time Dn to LE; see power MHz dissipation V = GND capacitance 74AHCT373 4 5 propagation Dn to Qn; see pd delay Qn; see enable time OE to Qn; see disable time ...
Page 10
... NXP Semiconductors 11. Waveforms Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 7. Data input to output propagation delays LE input Qn output Measurement points are given in V and V are typical voltage output levels that occur with the output load. ...
Page 11
... NXP Semiconductors OE input Qn output LOW-to-OFF OFF-to-LOW Qn output HIGH-to-OFF OFF-to-HIGH Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 9. Enable and disable times Dn input LE input Measurement points are given in V and V are typical voltage output levels that occur with the output load. ...
Page 12
... NXP Semiconductors negative positive Test data is given in Table Definitions test circuit termination resistance should be equal to output impedance load capacitance including jig and probe capacitance load resistance test selection switch. Fig 11. Test circuitry for switching times Table 9. Test data Type Input V I 74AHC373 ...
Page 13
... NXP Semiconductors 12. Package outline SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
Page 14
... NXP Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
Page 15
... Document ID Release date 74AHC_AHCT373_3 20080520 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Table 74AHC_AHCT373_2 19991123 74AHC_AHCT373_1 ...
Page 16
... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
Page 17
... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15 14 Revision history ...